diff options
| author | Roland Sahlsten <Roland.Sahlsten.ASE10@fh-joanneum.at> | 2012-05-08 06:43:34 +0000 |
|---|---|---|
| committer | Roland Sahlsten <Roland.Sahlsten.ASE10@fh-joanneum.at> | 2012-05-08 06:43:34 +0000 |
| commit | 7446bd874823bb058d872fa0718ff774379e8118 (patch) | |
| tree | 4506ac0a5776da491ab5755dafdcefbb3fa6ab26 /software | |
| parent | added datasheet for RF SPDT (diff) | |
git-svn-id: https://svn.spreadspace.org/mur.sat@403 7de4ea59-55d0-425e-a1af-a3118ea81d4c
Diffstat (limited to 'software')
| -rw-r--r-- | software/mpu/MurSatMPU Debug.launch | 2 | ||||
| -rw-r--r-- | software/mpu/inc/Types.h | 6 | ||||
| -rw-r--r-- | software/mpu/src/adc.c | 250 | ||||
| -rw-r--r-- | software/mpu/src/adc.h | 35 | ||||
| -rw-r--r-- | software/mpu/src/boot.c | 6 | ||||
| -rw-r--r-- | software/mpu/src/camera.c | 26 | ||||
| -rw-r--r-- | software/mpu/src/kernel.c | 47 | ||||
| -rw-r--r-- | software/mpu/src/lightsens.c | 60 | ||||
| -rw-r--r-- | software/mpu/src/uart.c | 198 | ||||
| -rw-r--r-- | software/mpu/src/uart.h | 55 |
10 files changed, 665 insertions, 20 deletions
diff --git a/software/mpu/MurSatMPU Debug.launch b/software/mpu/MurSatMPU Debug.launch index 8f240df..5b51271 100644 --- a/software/mpu/MurSatMPU Debug.launch +++ b/software/mpu/MurSatMPU Debug.launch @@ -16,7 +16,7 @@ <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
-<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="pData-Msg-kernel_Process_Task-(cast)" val="char*"/><content id="*pxQueue_Kernel-pxQueue_Kernel-boot_CreateQueues-(cast_to_array)" val="0:1"/><content id="u-prvLoopBackTestTask-(format)" val="1"/></contentList>"/>
+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="pData-Msg-kernel_Process_Task-(cast)" val="char*"/><content id="*pxQueue_Kernel-pxQueue_Kernel-boot_CreateQueues-(cast_to_array)" val="0:1"/><content id="u-prvLoopBackTestTask-(format)" val="1"/><content id="pData-Msg-lightsens_Process_Task-(cast)" val="unsigned char*"/><content id="pData-Msg-lightsens_Process_Task-(cast_to_array)" val="0:10"/><content id="BufferPtr-UARTSend-(cast_to_array)" val="0:10"/><content id="pData-RcvMsg-kernel_Process_Task-(cast_to_array)" val="0:10"/></contentList>"/>
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug\MurSatMPU.axf"/>
diff --git a/software/mpu/inc/Types.h b/software/mpu/inc/Types.h index 1ceeaad..9cb0101 100644 --- a/software/mpu/inc/Types.h +++ b/software/mpu/inc/Types.h @@ -4,6 +4,7 @@ #define MS(ms) portTICK_RATE_MS * (ms)
+/* Status_t*/
typedef enum
{
STATUS_OK = 0x0U,
@@ -13,14 +14,17 @@ typedef enum STATUS_ERROR_TIMEOUT
}Status_t;
+/* Sender_t */
typedef enum
{
Sender_Kernel = 0x0,
Sender_Camera,
Sender_Spi,
- Sender_LightSens
+ Sender_LightSens,
+ Sender_UART
}Sender_t;
+/* Message_t */
typedef struct
{
void *pData;
diff --git a/software/mpu/src/adc.c b/software/mpu/src/adc.c new file mode 100644 index 0000000..1c1f45a --- /dev/null +++ b/software/mpu/src/adc.c @@ -0,0 +1,250 @@ +/*****************************************************************************
+ * main.c: Main C file for NXP LPC13xx Family Microprocessors
+ *
+ * Copyright(C) 2008, NXP Semiconductor
+ * All rights reserved.
+ *
+ * History
+ * 2008.07.20 ver 1.00 Preliminary version, first Release
+ *
+*****************************************************************************/
+#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
+#include "adc.h"
+
+volatile uint32_t ADCValue[ADC_NUM];
+volatile uint32_t ADCIntDone = 0;
+
+#if BURST_MODE
+volatile uint32_t channel_flag;
+#endif
+
+#if ADC_INTERRUPT_FLAG
+/******************************************************************************
+** Function name: ADC_IRQHandler
+**
+** Descriptions: ADC interrupt handler
+**
+** parameters: None
+** Returned value: None
+**
+******************************************************************************/
+void ADC_IRQHandler (void)
+{
+ uint32_t regVal;
+
+ LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
+ regVal = LPC_ADC->STAT; /* Read ADC will clear the interrupt */
+ if ( regVal & 0x0000FF00 ) /* check OVERRUN error first */
+ {
+ regVal = (regVal & 0x0000FF00) >> 0x08;
+ /* if overrun, just read ADDR to clear */
+ /* regVal variable has been reused. */
+ switch ( regVal )
+ {
+ case 0x01:
+ regVal = LPC_ADC->DR0;
+ break;
+ case 0x02:
+ regVal = LPC_ADC->DR1;
+ break;
+ case 0x04:
+ regVal = LPC_ADC->DR2;
+ break;
+ case 0x08:
+ regVal = LPC_ADC->DR3;
+ break;
+ case 0x10:
+ regVal = LPC_ADC->DR4;
+ break;
+ case 0x20:
+ regVal = LPC_ADC->DR5;
+ break;
+ case 0x40:
+ regVal = LPC_ADC->DR6;
+ break;
+ case 0x80:
+ regVal = LPC_ADC->DR7;
+ break;
+ default:
+ break;
+ }
+ LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
+ ADCIntDone = 1;
+ return;
+ }
+
+ if ( regVal & ADC_ADINT )
+ {
+ switch ( regVal & 0xFF ) /* check DONE bit */
+ {
+ case 0x01:
+ ADCValue[0] = ( LPC_ADC->DR0 >> 6 ) & 0x3FF;
+ break;
+ case 0x02:
+ ADCValue[1] = ( LPC_ADC->DR1 >> 6 ) & 0x3FF;
+ break;
+ case 0x04:
+ ADCValue[2] = ( LPC_ADC->DR2 >> 6 ) & 0x3FF;
+ break;
+ case 0x08:
+ ADCValue[3] = ( LPC_ADC->DR3 >> 6 ) & 0x3FF;
+ break;
+ case 0x10:
+ ADCValue[4] = ( LPC_ADC->DR4 >> 6 ) & 0x3FF;
+ break;
+ case 0x20:
+ ADCValue[5] = ( LPC_ADC->DR5 >> 6 ) & 0x3FF;
+ break;
+ case 0x40:
+ ADCValue[6] = ( LPC_ADC->DR6 >> 6 ) & 0x3FF;
+ break;
+ case 0x80:
+ ADCValue[7] = ( LPC_ADC->DR7 >> 6 ) & 0x3FF;
+ break;
+ default:
+ break;
+ }
+#if BURST_MODE
+ channel_flag |= (regVal & 0xFF);
+ if ( (channel_flag & 0xFF) == 0xFF )
+ {
+ /* All the bits in have been set, it indicates all the ADC
+ channels have been converted. */
+ LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
+ }
+#endif
+ ADCIntDone = 1;
+ }
+ return;
+}
+#endif
+
+/*****************************************************************************
+** Function name: ADCInit
+**
+** Descriptions: initialize ADC channel
+**
+** parameters: ADC clock rate
+** Returned value: None
+**
+*****************************************************************************/
+void ADCInit( uint32_t ADC_Clk )
+{
+ /* Disable Power down bit to the ADC block. */
+ LPC_SYSCON->PDRUNCFG &= ~(0x1<<4);
+
+ /* Enable AHB clock to the ADC. */
+ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<13);
+
+ /* Unlike some other pings, for ADC test, all the pins need
+ to set to analog mode. Bit 7 needs to be cleared according
+ to design team. */
+#ifdef __JTAG_DISABLED
+ LPC_IOCON->JTAG_TDI_PIO0_11 &= ~0x8F; /* ADC I/O config */
+ LPC_IOCON->JTAG_TDI_PIO0_11 |= 0x02; /* ADC IN0 */
+ LPC_IOCON->JTAG_TMS_PIO1_0 &= ~0x8F;
+ LPC_IOCON->JTAG_TMS_PIO1_0 |= 0x02; /* ADC IN1 */
+ LPC_IOCON->JTAG_TDO_PIO1_1 &= ~0x8F;
+ LPC_IOCON->JTAG_TDO_PIO1_1 |= 0x02; /* ADC IN2 */
+ LPC_IOCON->JTAG_nTRST_PIO1_2 &= ~0x8F;
+ LPC_IOCON->JTAG_nTRST_PIO1_2 |= 0x02; /* ADC IN3 */
+#ifdef __SWD_DISABLED
+ LPC_IOCON->ARM_SWDIO_PIO1_3 &= ~0x8F;
+ LPC_IOCON->ARM_SWDIO_PIO1_3 |= 0x02; /* ADC IN4 */
+#endif
+#endif
+ LPC_IOCON->JTAG_TDI_PIO0_11 = 0x02; // Select AD0 pin function
+ LPC_IOCON->JTAG_TMS_PIO1_0 = 0x02; // Select AD1 pin function
+ LPC_IOCON->JTAG_TDO_PIO1_1 = 0x02; // Select AD2 pin function
+ LPC_IOCON->JTAG_nTRST_PIO1_2 = 0x02; // Select AD3 pin function
+// LPC_IOCON->ARM_SWDIO_PIO1_3 = 0x02; // Select AD4 pin function
+ LPC_IOCON->PIO1_4 = 0x01; // Select AD5 pin function
+ LPC_IOCON->PIO1_10 = 0x01; // Select AD6 pin function
+ LPC_IOCON->PIO1_11 = 0x01; // Select AD7 pin function
+
+ LPC_ADC->CR = ((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_Clk-1)<<8;
+
+ /* If POLLING, no need to do the following */
+#if ADC_INTERRUPT_FLAG
+ NVIC_EnableIRQ(ADC_IRQn);
+ LPC_ADC->INTEN = 0x1FF; /* Enable all interrupts */
+#endif
+ return;
+}
+
+/*****************************************************************************
+** Function name: ADCRead
+**
+** Descriptions: Read ADC channel
+**
+** parameters: Channel number
+** Returned value: Value read, if interrupt driven, return channel #
+**
+*****************************************************************************/
+uint32_t ADCRead( uint8_t channelNum )
+{
+#if !ADC_INTERRUPT_FLAG
+ uint32_t regVal, ADC_Data;
+#endif
+
+ /* channel number is 0 through 7 */
+ if ( channelNum >= ADC_NUM )
+ {
+ channelNum = 0; /* reset channel number to 0 */
+ }
+ LPC_ADC->CR &= 0xFFFFFF00; // clear channel selection
+ LPC_ADC->CR |= (1 << 24) | (1 << channelNum);
+ /* switch channel,start A/D convert */
+#if !ADC_INTERRUPT_FLAG
+ while ( 1 ) /* wait until end of A/D convert */
+ {
+ regVal = *(volatile unsigned long *)(LPC_ADC_BASE
+ + ADC_OFFSET + ADC_INDEX * channelNum);
+ /* read result of A/D conversion */
+ if ( regVal & ADC_DONE )
+ {
+ break;
+ }
+ }
+
+ LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
+ if ( regVal & ADC_OVERRUN ) /* save data when it's not overrun, otherwise, return zero */
+ {
+ return ( 0 );
+ }
+ ADC_Data = ( regVal >> 6 ) & 0x3FF;
+ return ( ADC_Data ); /* return A/D conversion value */
+#else
+ return ( channelNum ); /* if it's interrupt driven, the ADC reading is
+ done inside the handler. so, return channel number */
+#endif
+}
+
+/*****************************************************************************
+** Function name: ADC0BurstRead
+**
+** Descriptions: Use burst mode to convert multiple channels once.
+**
+** parameters: None
+** Returned value: None
+**
+*****************************************************************************/
+void ADCBurstRead( void )
+{
+ if ( LPC_ADC->CR & (0x7<<24) )
+ {
+ LPC_ADC->CR &= ~(0x7<<24);
+ }
+ /* Test channel 5,6,7 using burst mode because they are not shared
+ with the JTAG pins. */
+ LPC_ADC->CR &= ~0xFF;
+ /* Read all channels, 0 through 7. */
+ LPC_ADC->CR |= (0xFF);
+ LPC_ADC->CR |= (0x1<<16); /* Set burst mode and start A/D convert */
+ return; /* the ADC reading is done inside the
+ handler, return 0. */
+}
+
+/*********************************************************************************
+** End Of File
+*********************************************************************************/
diff --git a/software/mpu/src/adc.h b/software/mpu/src/adc.h new file mode 100644 index 0000000..682b8eb --- /dev/null +++ b/software/mpu/src/adc.h @@ -0,0 +1,35 @@ +/*****************************************************************************
+ * adc.h: Header file for NXP LPC134x Family Microprocessors
+ *
+ * Copyright(C) 2008, NXP Semiconductor
+ * All rights reserved.
+ *
+ * History
+ * 2008.07.19 ver 1.00 Preliminary version, first Release
+ *
+******************************************************************************/
+#ifndef __ADC_H
+#define __ADC_H
+
+#define ADC_INTERRUPT_FLAG 0 /* 1 is interrupt driven, 0 is polling */
+#define BURST_MODE 0 /* Burst mode works in interrupt driven mode only. */
+#define ADC_DEBUG 1
+
+#define ADC_OFFSET 0x10
+#define ADC_INDEX 4
+
+#define ADC_DONE 0x80000000
+#define ADC_OVERRUN 0x40000000
+#define ADC_ADINT 0x00010000
+
+#define ADC_NUM 8 /* for LPC13xx */
+#define ADC_CLK 4500000 /* set to 4.5Mhz */
+
+extern void ADC_IRQHandler( void );
+extern void ADCInit( uint32_t ADC_Clk );
+extern uint32_t ADCRead( uint8_t channelNum );
+extern void ADCBurstRead( void );
+#endif /* end __ADC_H */
+/*****************************************************************************
+** End Of File
+******************************************************************************/
diff --git a/software/mpu/src/boot.c b/software/mpu/src/boot.c index d3b4d59..825aac5 100644 --- a/software/mpu/src/boot.c +++ b/software/mpu/src/boot.c @@ -18,9 +18,11 @@ Status_t kernel_Init_Kernel(QH_t xQueues); Status_t camera_Init_Camera(QH_t xQueues);
Status_t lightsens_Init_LightSens(QH_t xQueues);
+void UARTInit(uint32_t baudrate);
+
/*
* Globals */
-static QH_t qh;
+volatile QH_t qh;
Status_t boot_Init_Kernel(QH_t xQueues)
{
@@ -68,6 +70,8 @@ void boot_Main(void) Status = boot_Init_Camera(qh);
Status = boot_Init_LightSens(qh);
+ UARTInit(115200);
+
/* Start the tasks. */
vTaskStartScheduler();
}
diff --git a/software/mpu/src/camera.c b/software/mpu/src/camera.c index 4fad440..8ec62d3 100644 --- a/software/mpu/src/camera.c +++ b/software/mpu/src/camera.c @@ -16,28 +16,34 @@ static Task_Param_t TaskParam_Camera;
/*
- * Wake up other tasks, send them messages telling what to do,
- * wait for them to have processed the commands or not, maybe
- * put them to sleep again, ...
+ * The camera is connected to the MPU vie I2C to control the camera,
+ * and has a 8 bit bus for data transmission ...
* */
static void camera_Process_Task(void *Param)
{
Message_t Msg;
+ portCHAR chMsgBufCam[10] = "Hello Kl!";
if(NULL == TaskParam_Camera.QueueHandles.hxq_Camera)
{
return;
}
+
while(1)
{
- if( xQueueReceive( TaskParam_Camera.QueueHandles.hxq_Camera,
- &Msg, portTICK_RATE_MS * 5 ))
+ if( xQueueReceive( TaskParam_Camera.QueueHandles.hxq_Camera, &Msg, MS(5) ))
{
- /*
- * switch Msg.Sender
- *
- */
- ;
+ switch (Msg.Sender)
+ {
+ case Sender_Kernel:
+ {
+ Msg.Sender = Sender_Camera;
+ Msg.pData = chMsgBufCam;
+ xQueueSend(TaskParam_Camera.QueueHandles.hxq_Kernel, &Msg, MS(10));
+ }
+ default: {;} /* for the time being we ignore messages received from
+ someone other than the kernel. */
+ }
}
}
}
diff --git a/software/mpu/src/kernel.c b/software/mpu/src/kernel.c index d75f9dd..f5d04ea 100644 --- a/software/mpu/src/kernel.c +++ b/software/mpu/src/kernel.c @@ -7,12 +7,18 @@ #include "Types.h"
#include "FreeRTOS.h"
#include "queue.h"
+#include "uart.h"
#define kernel_TASK_PRIORITY ( tskIDLE_PRIORITY + 5 )
#define kernel_TASK_STACK_SIZE ( ( unsigned short ) 64 )
+void UARTSend(uint8_t *BufferPtr, uint32_t Length);
+
/* Globals */
+#define BUFSIZE 0x40 // fixme: ...is sdefined in hart.h
static Task_Param_t kernel_Param;
+extern volatile uint32_t UARTCount;
+extern volatile uint8_t UARTBuffer[BUFSIZE];
/*
* Wake up other tasks, send them messages telling what to do,
@@ -21,11 +27,12 @@ static Task_Param_t kernel_Param; * */
static void kernel_Process_Task(void *Param)
{
- Message_t Msg;
+ Message_t RcvMsg;
Message_t SndMsg;
portTickType tick;
portCHAR chBufCam[10] = "Seas Cam!";
portCHAR chBufLSen[10] = "Seas LSe!";
+ portCHAR l = 'l';
if(NULL == kernel_Param.QueueHandles.hxq_Kernel)
{
@@ -37,25 +44,57 @@ static void kernel_Process_Task(void *Param) {
vTaskDelayUntil(&tick, MS(3));
- if( xQueueReceive( kernel_Param.QueueHandles.hxq_Kernel, &Msg, MS(5)))
+ if( xQueueReceive( kernel_Param.QueueHandles.hxq_Kernel, &RcvMsg, MS(5)))
{
/*
* switch Msg.Sender and act accordingly.
*/
- switch (Msg.Sender)
+ switch (RcvMsg.Sender)
{
case Sender_Camera:
{
SndMsg.Sender = Sender_Kernel;
SndMsg.pData = chBufCam;
xQueueSend(kernel_Param.QueueHandles.hxq_Camera, &SndMsg, MS(10));
+ break;
}
case Sender_LightSens:
{
SndMsg.Sender = Sender_Kernel;
SndMsg.pData = chBufLSen;
- xQueueSend(kernel_Param.QueueHandles.hxq_LightSens, &SndMsg, MS(10));
+ for(l = 0; l < 8; l ++)
+ {
+ UARTBuffer[l*4 +0] = 48+(((uint8_t *)(RcvMsg.pData))[l])%1000 / 100;
+ UARTBuffer[l*4 +1] = 48+(((uint8_t *)(RcvMsg.pData))[l])%100 / 10;
+ UARTBuffer[l*4 +2] = 48+(((uint8_t *)(RcvMsg.pData))[l])%10;
+ UARTBuffer[l*4 +3] = ' ';
+ }
+ UARTCount = 34;
+ UARTBuffer[32] = '\r';
+ UARTBuffer[33] = '\n';
+ UARTSend( (uint8_t *)UARTBuffer, UARTCount );
+// UARTSend( (uint8_t *)(RcvMsg.pData), 10 );
+// xQueueSend(kernel_Param.QueueHandles.hxq_LightSens, &SndMsg, MS(10));
+ break;
+ }
+ case Sender_UART:
+ {
+ if (UARTBuffer[UARTCount-1] != 'i')
+ break;
+ if ( UARTCount != 0 )
+ {
+ LPC_UART->IER = IER_THRE | IER_RLS; /* Disable RBR */
+ UARTSend( (uint8_t *)UARTBuffer, UARTCount );
+ UARTCount = 0;
+ LPC_UART->IER = IER_THRE | IER_RLS | IER_RBR; /* Re-enable RBR */
+
+ l = 'r';
+ SndMsg.pData = &l;
+
+ xQueueSend(kernel_Param.QueueHandles.hxq_LightSens, &SndMsg, MS(10));
+ }
+ break;
}
default: {;}
}
diff --git a/software/mpu/src/lightsens.c b/software/mpu/src/lightsens.c index 230a0c3..ed280f0 100644 --- a/software/mpu/src/lightsens.c +++ b/software/mpu/src/lightsens.c @@ -8,10 +8,20 @@ #include "Types.h"
#include "FreeRTOS.h"
#include "queue.h"
+#include "adc.h"
+
+#define LED_PORT 0 // Port for led
+#define LED_BIT 7 // Bit on port for led
#define TASK_PRIORITY_lightsens ( tskIDLE_PRIORITY + 2 )
#define TASK_STACK_SIZE_lightsens ( ( unsigned short ) 64 )
+
+/* Debug Helper */
+Status_t lightsens_ValueToString()
+{
+}
+
/* Globals */
static Task_Param_t TaskParam_LightSens;
@@ -25,6 +35,15 @@ static void lightsens_Process_Task(void *Param) Message_t Msg;
portCHAR chBufLSe[10] = "Seas Knl!";
+ portCHAR led;
+
+ portCHAR i;
+// volatile uint32_t ADCValue[ADC_NUM];
+ uint32_t ADCValue[ADC_NUM];
+
+ // set led port to output
+ LPC_GPIO0->DIR |= 1<<LED_BIT;
+
if(NULL == TaskParam_LightSens.QueueHandles.hxq_LightSens)
{
return;
@@ -33,6 +52,14 @@ static void lightsens_Process_Task(void *Param) Msg.Sender = Sender_LightSens;
Msg.pData = chBufLSe;
xQueueSend(TaskParam_LightSens.QueueHandles.hxq_Kernel, &Msg, MS(10));
+
+ /* Initialize ADC */
+ ADCInit( ADC_CLK );
+ for ( i = 0; i < ADC_NUM; i++ )
+ {
+ ADCValue[i] = ADCRead( i ); /* Polling */
+ }
+
while(1)
{
if( xQueueReceive( TaskParam_LightSens.QueueHandles.hxq_LightSens, &Msg, MS(5)))
@@ -41,9 +68,36 @@ static void lightsens_Process_Task(void *Param) * switch Msg.Sender
*
*/
- Msg.Sender = Sender_LightSens;
- Msg.pData = chBufLSe;
- xQueueSend(TaskParam_LightSens.QueueHandles.hxq_Kernel, &Msg, MS(10));
+ switch (Msg.Sender)
+ {
+ case Sender_Kernel:
+ {
+ if (((portCHAR*)(Msg.pData))[0] == 'l')
+ {
+ if(led)
+ led = 0;
+ else
+ led = 1<<LED_BIT;
+
+
+ // LPC_GPIO0->MASKED_ACCESS[(1<<LED_BIT)] = led;
+ }
+ if(((portCHAR*)(Msg.pData))[0] == 'r')
+ {
+ for ( i = 0; i < ADC_NUM; i++ )
+ {
+ ADCValue[i] = ADCRead( i ); /* Polling */
+ }
+ }
+
+ Msg.Sender = Sender_LightSens;
+ Msg.pData = chBufLSe;
+ Msg.pData = ADCValue;
+ xQueueSend(TaskParam_LightSens.QueueHandles.hxq_Kernel, &Msg, MS(10));
+ }
+ default: {;} /* for the time being we ignore messages received from
+ someone other than the kernel. */
+ }
}
}
}
diff --git a/software/mpu/src/uart.c b/software/mpu/src/uart.c new file mode 100644 index 0000000..6626dfc --- /dev/null +++ b/software/mpu/src/uart.c @@ -0,0 +1,198 @@ +/*****************************************************************************
+ * uart.c: UART API file for NXP LPC13xx Family Microprocessors
+ *
+ * Copyright(C) 2008, NXP Semiconductor
+ * All rights reserved.
+ *
+ * History
+ * 2008.08.21 ver 1.00 Preliminary version, first Release
+ *
+******************************************************************************/
+#include "LPC13xx.h"
+#include "uart.h"
+
+#include "Types.h"
+#include "FreeRTOS.h"
+#include "queue.h"
+
+
+// CodeRed - change for CMSIS 1.3
+#define SystemFrequency SystemCoreClock
+
+extern volatile QH_t qh;
+
+volatile uint32_t UARTStatus;
+volatile uint8_t UARTTxEmpty = 1;
+volatile uint8_t UARTBuffer[BUFSIZE];
+volatile uint32_t UARTCount = 0;
+
+/*****************************************************************************
+** Function name: UART_IRQHandler
+**
+** Descriptions: UART interrupt handler
+**
+** parameters: None
+** Returned value: None
+**
+*****************************************************************************/
+void UART_IRQHandler(void)
+{
+ uint8_t IIRValue, LSRValue;
+ uint8_t Dummy = Dummy;
+ Message_t SndMsg;
+
+ IIRValue = LPC_UART->IIR;
+
+ IIRValue >>= 1; /* skip pending bit in IIR */
+ IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
+ if (IIRValue == IIR_RLS) /* Receive Line Status */
+ {
+ LSRValue = LPC_UART->LSR;
+ /* Receive Line Status */
+ if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
+ {
+ /* There are errors or break interrupt */
+ /* Read LSR will clear the interrupt */
+ UARTStatus = LSRValue;
+ Dummy = LPC_UART->RBR; /* Dummy read on RX to clear
+ interrupt, then bail out */
+ return;
+ }
+ if (LSRValue & LSR_RDR) /* Receive Data Ready */
+ {
+ /* If no error on RLS, normal ready, save into the data buffer. */
+ /* Note: read RBR will clear the interrupt */
+ UARTBuffer[UARTCount++] = LPC_UART->RBR;
+ if (UARTCount == BUFSIZE)
+ {
+ UARTCount = 0; /* buffer overflow */
+ }
+ }
+ }
+ else if (IIRValue == IIR_RDA) /* Receive Data Available */
+ {
+ /* Receive Data Available */
+ UARTBuffer[UARTCount++] = LPC_UART->RBR;
+ if (UARTCount == BUFSIZE)
+ {
+ UARTCount = 0; /* buffer overflow */
+ }
+ }
+ else if (IIRValue == IIR_CTI) /* Character timeout indicator */
+ {
+ /* Character Time-out indicator */
+ UARTStatus |= 0x100; /* Bit 9 as the CTI error */
+ }
+ else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
+ {
+ /* THRE interrupt */
+ LSRValue = LPC_UART->LSR; /* Check status in the LSR to see if
+ valid data in U0THR or not */
+ if (LSRValue & LSR_THRE)
+ {
+ UARTTxEmpty = 1;
+ }
+ else
+ {
+ UARTTxEmpty = 0;
+ }
+ }
+ SndMsg.Sender = Sender_UART;
+ xQueueSendFromISR(qh.hxq_Kernel, &SndMsg, 0);
+
+ return;
+}
+
+/*****************************************************************************
+** Function name: UARTInit
+**
+** Descriptions: Initialize UART0 port, setup pin select,
+** clock, parity, stop bits, FIFO, etc.
+**
+** parameters: UART baudrate
+** Returned value: None
+**
+*****************************************************************************/
+void UARTInit(uint32_t baudrate)
+{
+ uint32_t Fdiv;
+ uint32_t regVal;
+
+ UARTTxEmpty = 1;
+ UARTCount = 0;
+
+ NVIC_DisableIRQ(UART_IRQn);
+
+ LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */
+ LPC_IOCON->PIO1_6 |= 0x01; /* UART RXD */
+ LPC_IOCON->PIO1_7 &= ~0x07;
+ LPC_IOCON->PIO1_7 |= 0x01; /* UART TXD */
+ /* Enable UART clock */
+ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
+ LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
+
+ LPC_UART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
+ regVal = LPC_SYSCON->UARTCLKDIV;
+ Fdiv = (((SystemFrequency/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ; /*baud rate */
+
+ LPC_UART->DLM = Fdiv / 256;
+ LPC_UART->DLL = Fdiv % 256;
+ LPC_UART->LCR = 0x03; /* DLAB = 0 */
+ LPC_UART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
+
+ /* Read to clear the line status. */
+ regVal = LPC_UART->LSR;
+
+ /* Ensure a clean start, no data in either TX or RX FIFO. */
+// CodeRed - added parentheses around comparison in operand of &
+ while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
+ while ( LPC_UART->LSR & LSR_RDR )
+ {
+ regVal = LPC_UART->RBR; /* Dump data from RX FIFO */
+ }
+
+ /* Enable the UART Interrupt */
+ NVIC_EnableIRQ(UART_IRQn);
+
+#if TX_INTERRUPT
+ LPC_UART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
+#else
+ LPC_UART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
+#endif
+ return;
+}
+
+/*****************************************************************************
+** Function name: UARTSend
+**
+** Descriptions: Send a block of data to the UART 0 port based
+** on the data length
+**
+** parameters: buffer pointer, and data length
+** Returned value: None
+**
+*****************************************************************************/
+void UARTSend(uint8_t *BufferPtr, uint32_t Length)
+{
+
+ while ( Length != 0 )
+ {
+ /* THRE status, contain valid data */
+#if !TX_INTERRUPT
+ while ( !(LPC_UART->LSR & LSR_THRE) );
+ LPC_UART->THR = *BufferPtr;
+#else
+ /* Below flag is set inside the interrupt handler when THRE occurs. */
+ while ( !(UARTTxEmpty & 0x01) );
+ LPC_UART->THR = *BufferPtr;
+ UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
+#endif
+ BufferPtr++;
+ Length--;
+ }
+ return;
+}
+
+/******************************************************************************
+** End Of File
+******************************************************************************/
diff --git a/software/mpu/src/uart.h b/software/mpu/src/uart.h new file mode 100644 index 0000000..ee8f89b --- /dev/null +++ b/software/mpu/src/uart.h @@ -0,0 +1,55 @@ +/*****************************************************************************
+ * uart.h: Header file for NXP LPC13xx Family Microprocessors
+ *
+ * Copyright(C) 2008, NXP Semiconductor
+ * All rights reserved.
+ *
+ * History
+ * 2008.08.21 ver 1.00 Preliminary version, first Release
+ *
+******************************************************************************/
+#ifndef __UART_H
+#define __UART_H
+
+
+#define RS485_ENABLED 0
+#define TX_INTERRUPT 0 /* 0 if TX uses polling, 1 interrupt driven. */
+#define MODEM_TEST 0
+
+#define IER_RBR 0x01
+#define IER_THRE 0x02
+#define IER_RLS 0x04
+
+#define IIR_PEND 0x01
+#define IIR_RLS 0x03
+#define IIR_RDA 0x02
+#define IIR_CTI 0x06
+#define IIR_THRE 0x01
+
+#define LSR_RDR 0x01
+#define LSR_OE 0x02
+#define LSR_PE 0x04
+#define LSR_FE 0x08
+#define LSR_BI 0x10
+#define LSR_THRE 0x20
+#define LSR_TEMT 0x40
+#define LSR_RXFE 0x80
+
+#define BUFSIZE 0x40
+
+/* RS485 mode definition. */
+#define RS485_NMMEN (0x1<<0)
+#define RS485_RXDIS (0x1<<1)
+#define RS485_AADEN (0x1<<2)
+#define RS485_SEL (0x1<<3)
+#define RS485_DCTRL (0x1<<4)
+#define RS485_OINV (0x1<<5)
+
+void UARTInit(uint32_t Baudrate);
+void UART_IRQHandler(void);
+void UARTSend(uint8_t *BufferPtr, uint32_t Length);
+
+#endif /* end __UART_H */
+/*****************************************************************************
+** End Of File
+******************************************************************************/
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