diff options
Diffstat (limited to 'software/mpu/src')
| -rw-r--r-- | software/mpu/src/Kopie von main.c | 185 | ||||
| -rw-r--r-- | software/mpu/src/boot.c | 57 | ||||
| -rw-r--r-- | software/mpu/src/cr_startup_lpc13.c | 367 | ||||
| -rw-r--r-- | software/mpu/src/kernel.c | 55 | ||||
| -rw-r--r-- | software/mpu/src/main.c | 15 | ||||
| -rw-r--r-- | software/mpu/src/ssp.c | 263 | ||||
| -rw-r--r-- | software/mpu/src/test_ssp.c | 7 |
7 files changed, 949 insertions, 0 deletions
diff --git a/software/mpu/src/Kopie von main.c b/software/mpu/src/Kopie von main.c new file mode 100644 index 0000000..bb1399b --- /dev/null +++ b/software/mpu/src/Kopie von main.c @@ -0,0 +1,185 @@ +/*
+===============================================================================
+ Name : main.c
+ Author :
+ Version :
+ Copyright : Copyright (C)
+ Description : main definition
+===============================================================================
+*/
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+/* SSP includes */
+#include "ssp.h"
+
+/* Priorities at which the tasks are created. */
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
+#define mainQUEUE_SSP_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
+
+#define configSND_TASK_STACK_SIZE ( ( unsigned short ) 32 )
+#define configRCV_TASK_STACK_SIZE ( ( unsigned short ) 32 )
+#define configSPI_LOOP_TASK_STACK_SIZE ( ( unsigned short ) 32 )
+
+/* The bit of port 0 that the LPCXpresso LPC13xx LED is connected. */
+#define mainLED_BIT ( 7 )
+
+/* The rate at which data is sent to the queue, specified in milliseconds. */
+#define mainQUEUE_SEND_FREQUENCY_MS ( 500 / portTICK_RATE_MS )
+
+/* The number of items the queue can hold. This is 1 as the receive task
+will remove items as they are added, meaning the send task should always find
+the queue empty. */
+#define mainQUEUE_LENGTH ( 1 )
+
+/*
+ * The tasks.
+ */
+static void prvQueueReceiveTask( void *pvParameters );
+static void prvQueueSendTask( void *pvParameters );
+static void prvLoopBackTestTask( void *pvParameters );
+
+/*
+ * Simple function to toggle the LED on the LPCXpresso LPC13xx board.
+ */
+static void prvToggleLED( void );
+
+/* The queue used by both tasks. */
+static xQueueHandle xQueue = NULL;
+
+/* SSP buffer */
+ uint8_t src_addr[SSP_BUFSIZE];
+ uint8_t dest_addr[SSP_BUFSIZE];
+/*-----------------------------------------------------------*/
+
+int main(void) {
+
+ /* Set the LPCXpresso LPC13xx LED port to output. */
+ LPC_GPIO0->DIR |= ( 0x1 << mainLED_BIT );
+
+ /* Create the queue. */
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
+
+ if( xQueue != NULL )
+ {
+ /* Start the two tasks as described in the accompanying application
+ note. */
+ xTaskCreate( prvQueueReceiveTask, ( signed char * ) "Rx", configRCV_TASK_STACK_SIZE, NULL, mainQUEUE_RECEIVE_TASK_PRIORITY, NULL );
+ xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configSND_TASK_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
+ xTaskCreate( prvLoopBackTestTask, ( signed char * ) "LoopBckTst", configSPI_LOOP_TASK_STACK_SIZE, NULL, mainQUEUE_SSP_TASK_PRIORITY, NULL );
+
+ /* Start the tasks running. */
+ vTaskStartScheduler();
+ }
+
+ /* If all is well we will never reach here as the scheduler will now be
+ running. If we do reach here then it is likely that there was insufficient
+ heap available for the idle task to be created. */
+ for( ;; );
+/*
+ // Enter an infinite loop, just incrementing a counter
+ volatile static int i = 0 ;
+ while(1) {
+ i++ ;
+ }
+*/
+ return 0 ;
+}
+
+
+/*
+ * -------------------------------------------------------------
+ */
+static void prvQueueSendTask( void *pvParameters )
+{
+ portTickType xNextWakeTime;
+ unsigned long ulValueToSend = 100UL;
+
+ /* Initialise xNextWakeTime - this only needs to be done once. */
+ xNextWakeTime = xTaskGetTickCount();
+
+ for( ;; )
+ {
+ /* Place this task in the blocked state until it is time to run again.
+ The block state is specified in ticks, the constant used converts ticks
+ to ms. While in the blocked state this task will not consume any CPU
+ time. */
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
+
+ /* Send to the queue - causing the queue receive task to flash its LED.
+ 0 is used as the block time so the sending operation will not block -
+ it shouldn't need to block as the queue should always be empty at this
+ point in the code. */
+ if(ulValueToSend == 200UL)
+ ulValueToSend = 100UL;
+ else
+ ulValueToSend = 200UL;
+ xQueueSend( xQueue, &ulValueToSend, 0 );
+
+ }
+}
+/*-----------------------------------------------------------*/
+
+static void prvQueueReceiveTask( void *pvParameters )
+{
+unsigned long ulReceivedValue;
+
+ for( ;; )
+ {
+ /* Wait until something arrives in the queue - this task will block
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
+ FreeRTOSConfig.h. */
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
+
+ /* To get here something must have been received from the queue, but
+ is it the expected value? If it is, toggle the LED. */
+ if( ulReceivedValue == 100UL )
+ {
+ prvToggleLED();
+ }
+ }
+}
+/*-----------------------------------------------------------*/
+static void prvLoopBackTestTask( void *pvParameters )
+{
+ uint8_t u;
+ unsigned long ulReceivedValue;
+ portTickType xNextWakeTime;
+
+ xNextWakeTime = xTaskGetTickCount();
+ u = 3;
+ SSPInit();
+
+ for(;;)
+ {
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
+ if(ulReceivedValue == 200UL)
+ {
+ prvToggleLED();
+ vTaskDelayUntil( &xNextWakeTime, (500 / portTICK_RATE_MS) );
+ prvToggleLED();
+ vTaskDelayUntil( &xNextWakeTime, (500 / portTICK_RATE_MS) );
+ prvToggleLED();
+ }
+ vTaskDelayUntil( &xNextWakeTime, (100 / portTICK_RATE_MS) );
+ u++;
+ LoopbackTest();
+ }
+}
+/*-----------------------------------------------------------*/
+
+static void prvToggleLED( void )
+{
+/* This function is only called from one task so does not have to be reentrant,
+so the static qualifier is acceptable. */
+static unsigned long ulLEDState = 1;
+
+ /* Turn the LED off if it was on, and on if it was off. */
+ ulLEDState = !ulLEDState;
+ LPC_GPIO0->MASKED_ACCESS[ ( 1 << mainLED_BIT) ] = ( ulLEDState << mainLED_BIT );
+}
+/*-----------------------------------------------------------*/
diff --git a/software/mpu/src/boot.c b/software/mpu/src/boot.c new file mode 100644 index 0000000..1f18918 --- /dev/null +++ b/software/mpu/src/boot.c @@ -0,0 +1,57 @@ +/*
+ * boot.c
+ *
+ * Created on: 13.09.2011
+ * Author: Roland
+ */
+
+#include "Types.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+//static void kernel_Process_Task(void *Param);
+//static xTaskHandle *pkernel_TaskHandle;
+//static Task_Param_t kernel_Param;
+
+Status_t kernel_Init_Kernel(xQueueHandle * pxQueue);
+
+Status_t boot_Init_Kernel(xQueueHandle * pxQueue)
+{
+ return kernel_Init_Kernel( pxQueue );
+}
+Status_t boot_Init_Camera(xQueueHandle * pxQueue)
+{
+ return STATUS_OK;
+}
+Status_t boot_Init_LightSens(xQueueHandle * pxQueue)
+{
+ return STATUS_OK;
+}
+
+Status_t boot_CreateQueues( xQueueHandle *pxQueue_Kernel,
+ xQueueHandle *pxQueue_Camera,
+ xQueueHandle *pxQueue_LightSens)
+{
+ return STATUS_OK;
+}
+void boot_Main(void)
+{
+ /*
+ *
+ * */
+ Status_t Status;
+ xQueueHandle * pxQueue_Kernel = NULL,
+ * pxQueue_Camera = NULL,
+ * pxQueue_LightSens = NULL;
+
+ Status = boot_CreateQueues(pxQueue_Kernel, pxQueue_Camera, pxQueue_LightSens);
+
+ Status = boot_Init_Kernel(pxQueue_Kernel);
+ Status = boot_Init_Camera(pxQueue_Camera);
+ Status = boot_Init_LightSens(pxQueue_LightSens);
+
+ /* Start the tasks. */
+ vTaskStartScheduler();
+}
+
diff --git a/software/mpu/src/cr_startup_lpc13.c b/software/mpu/src/cr_startup_lpc13.c new file mode 100644 index 0000000..48a9784 --- /dev/null +++ b/software/mpu/src/cr_startup_lpc13.c @@ -0,0 +1,367 @@ +//*****************************************************************************
+// +--+
+// | ++----+
+// +-++ |
+// | |
+// +-+--+ |
+// | +--+--+
+// +----+ Copyright (c) 2009-10 Code Red Technologies Ltd.
+//
+// Microcontroller Startup code for use with Red Suite
+//
+// Software License Agreement
+//
+// The software is owned by Code Red Technologies and/or its suppliers, and is
+// protected under applicable copyright laws. All rights are reserved. Any
+// use in violation of the foregoing restrictions may subject the user to criminal
+// sanctions under applicable laws, as well as to civil liability for the breach
+// of the terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
+// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
+// CODE RED TECHNOLOGIES LTD.
+//
+//*****************************************************************************
+#if defined (__cplusplus)
+#ifdef __REDLIB__
+#error Redlib does not support C++
+#else
+//*****************************************************************************
+//
+// The entry point for the C++ library startup
+//
+//*****************************************************************************
+extern "C" {
+ extern void __libc_init_array(void);
+}
+#endif
+#endif
+
+#define WEAK __attribute__ ((weak))
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))
+
+// Code Red - if CMSIS is being used, then SystemInit() routine
+// will be called by startup code rather than in application's main()
+#if defined (__USE_CMSIS)
+#include "system_LPC13xx.h"
+#endif
+
+//*****************************************************************************
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+//*****************************************************************************
+//
+// Forward declaration of the default handlers. These are aliased.
+// When the application defines a handler (with the same name), this will
+// automatically take precedence over these weak definitions
+//
+//*****************************************************************************
+void ResetISR(void);
+WEAK void NMI_Handler(void);
+WEAK void HardFault_Handler(void);
+WEAK void MemManage_Handler(void);
+WEAK void BusFault_Handler(void);
+WEAK void UsageFault_Handler(void);
+WEAK void SVCall_Handler(void);
+WEAK void DebugMon_Handler(void);
+WEAK void PendSV_Handler(void);
+WEAK void SysTick_Handler(void);
+WEAK void IntDefaultHandler(void);
+//*****************************************************************************
+//
+// Forward declaration of the specific IRQ handlers. These are aliased
+// to the IntDefaultHandler, which is a 'forever' loop. When the application
+// defines a handler (with the same name), this will automatically take
+// precedence over these weak definitions
+//
+//*****************************************************************************
+
+void I2C_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER16_0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER16_1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER32_0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER32_1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USB_FIQHandler(void) ALIAS(IntDefaultHandler);
+void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
+void FMC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PIOINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PIOINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PIOINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PIOINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void WAKEUP_IRQHandler(void) ALIAS(IntDefaultHandler);
+
+extern void xPortSysTickHandler(void);
+extern void xPortPendSVHandler(void);
+extern void vPortSVCHandler( void );
+
+//*****************************************************************************
+//
+// The entry point for the application.
+// __main() is the entry point for Redlib based applications
+// main() is the entry point for Newlib based applications
+//
+//*****************************************************************************
+#if defined (__REDLIB__)
+extern void __main(void);
+#endif
+extern int main(void);
+//*****************************************************************************
+//
+// External declaration for the pointer to the stack top from the Linker Script
+//
+//*****************************************************************************
+extern void _vStackTop(void);
+
+//*****************************************************************************
+#if defined (__cplusplus)
+} // extern "C"
+#endif
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+extern void (* const g_pfnVectors[])(void);
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) = {
+ // Core Level - CM3
+ &_vStackTop, // The initial stack pointer
+ ResetISR, // The reset handler
+ NMI_Handler, // The NMI handler
+ HardFault_Handler, // The hard fault handler
+ MemManage_Handler, // The MPU fault handler
+ BusFault_Handler, // The bus fault handler
+ UsageFault_Handler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ vPortSVCHandler, // SVCall handler
+ DebugMon_Handler, // Debug monitor handler
+ 0, // Reserved
+ xPortPendSVHandler, // The PendSV handler
+ xPortSysTickHandler, // The SysTick handler
+
+
+ // Wakeup sources (40 ea.) for the I/O pins:
+ // PIO0 (0:11)
+ // PIO1 (0:11)
+ // PIO2 (0:11)
+ // PIO3 (0:3)
+ WAKEUP_IRQHandler, // PIO0_0 Wakeup
+ WAKEUP_IRQHandler, // PIO0_1 Wakeup
+ WAKEUP_IRQHandler, // PIO0_2 Wakeup
+ WAKEUP_IRQHandler, // PIO0_3 Wakeup
+ WAKEUP_IRQHandler, // PIO0_4 Wakeup
+ WAKEUP_IRQHandler, // PIO0_5 Wakeup
+ WAKEUP_IRQHandler, // PIO0_6 Wakeup
+ WAKEUP_IRQHandler, // PIO0_7 Wakeup
+ WAKEUP_IRQHandler, // PIO0_8 Wakeup
+ WAKEUP_IRQHandler, // PIO0_9 Wakeup
+ WAKEUP_IRQHandler, // PIO0_10 Wakeup
+ WAKEUP_IRQHandler, // PIO0_11 Wakeup
+
+ WAKEUP_IRQHandler, // PIO1_0 Wakeup
+ WAKEUP_IRQHandler, // PIO1_1 Wakeup
+ WAKEUP_IRQHandler, // PIO1_2 Wakeup
+ WAKEUP_IRQHandler, // PIO1_3 Wakeup
+ WAKEUP_IRQHandler, // PIO1_4 Wakeup
+ WAKEUP_IRQHandler, // PIO1_5 Wakeup
+ WAKEUP_IRQHandler, // PIO1_6 Wakeup
+ WAKEUP_IRQHandler, // PIO1_7 Wakeup
+ WAKEUP_IRQHandler, // PIO1_8 Wakeup
+ WAKEUP_IRQHandler, // PIO1_9 Wakeup
+ WAKEUP_IRQHandler, // PIO1_10 Wakeup
+ WAKEUP_IRQHandler, // PIO1_11 Wakeup
+
+ WAKEUP_IRQHandler, // PIO2_0 Wakeup
+ WAKEUP_IRQHandler, // PIO2_1 Wakeup
+ WAKEUP_IRQHandler, // PIO2_2 Wakeup
+ WAKEUP_IRQHandler, // PIO2_3 Wakeup
+ WAKEUP_IRQHandler, // PIO2_4 Wakeup
+ WAKEUP_IRQHandler, // PIO2_5 Wakeup
+ WAKEUP_IRQHandler, // PIO2_6 Wakeup
+ WAKEUP_IRQHandler, // PIO2_7 Wakeup
+ WAKEUP_IRQHandler, // PIO2_8 Wakeup
+ WAKEUP_IRQHandler, // PIO2_9 Wakeup
+ WAKEUP_IRQHandler, // PIO2_10 Wakeup
+ WAKEUP_IRQHandler, // PIO2_11 Wakeup
+
+ WAKEUP_IRQHandler, // PIO3_0 Wakeup
+ WAKEUP_IRQHandler, // PIO3_1 Wakeup
+ WAKEUP_IRQHandler, // PIO3_2 Wakeup
+ WAKEUP_IRQHandler, // PIO3_3 Wakeup
+
+ I2C_IRQHandler, // I2C0
+ TIMER16_0_IRQHandler, // CT16B0 (16-bit Timer 0)
+ TIMER16_1_IRQHandler, // CT16B1 (16-bit Timer 1)
+ TIMER32_0_IRQHandler, // CT32B0 (32-bit Timer 0)
+ TIMER32_1_IRQHandler, // CT32B1 (32-bit Timer 1)
+ SSP_IRQHandler, // SSP0
+ UART_IRQHandler, // UART0
+
+ USB_IRQHandler, // USB IRQ
+ USB_FIQHandler, // USB FIQ
+
+ ADC_IRQHandler, // ADC (A/D Converter)
+ WDT_IRQHandler, // WDT (Watchdog Timer)
+ BOD_IRQHandler, // BOD (Brownout Detect)
+ FMC_IRQHandler, // Flash (IP2111 Flash Memory Controller)
+ PIOINT3_IRQHandler, // PIO INT3
+ PIOINT2_IRQHandler, // PIO INT2
+ PIOINT1_IRQHandler, // PIO INT1
+ PIOINT0_IRQHandler, // PIO INT0
+
+ };
+
+//*****************************************************************************
+//
+// The following are constructs created by the linker, indicating where the
+// the "data" and "bss" segments reside in memory. The initializers for the
+// for the "data" segment resides immediately following the "text" segment.
+//
+//*****************************************************************************
+extern unsigned long _etext;
+extern unsigned long _data;
+extern unsigned long _edata;
+extern unsigned long _bss;
+extern unsigned long _ebss;
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void) {
+ unsigned long *pulSrc, *pulDest;
+
+ //
+ // Copy the data segment initializers from flash to SRAM.
+ //
+ pulSrc = &_etext;
+ for (pulDest = &_data; pulDest < &_edata;) {
+ *pulDest++ = *pulSrc++;
+ }
+
+ //
+ // Zero fill the bss segment. This is done with inline assembly since this
+ // will clear the value of pulDest if it is not kept in a register.
+ //
+ __asm(" ldr r0, =_bss\n"
+ " ldr r1, =_ebss\n"
+ " mov r2, #0\n"
+ " .thumb_func\n"
+ "zero_loop:\n"
+ " cmp r0, r1\n"
+ " it lt\n"
+ " strlt r2, [r0], #4\n"
+ " blt zero_loop");
+
+#ifdef __USE_CMSIS
+ SystemInit();
+#endif
+
+#if defined (__cplusplus)
+ //
+ // Call C++ library initialisation
+ //
+ __libc_init_array();
+#endif
+
+#if defined (__REDLIB__)
+ // Call the Redlib library, which in turn calls main()
+ __main() ;
+#else
+ main();
+#endif
+ //
+ // main() shouldn't return, but if it does, we'll just enter an infinite loop
+ //
+ while (1) {
+ ;
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+void NMI_Handler(void) {
+ while (1) {
+ }
+}
+
+void HardFault_Handler(void) {
+ while (1) {
+ }
+}
+
+void MemManage_Handler(void) {
+ while (1) {
+ }
+}
+
+void BusFault_Handler(void) {
+ while (1) {
+ }
+}
+
+void UsageFault_Handler(void) {
+ while (1) {
+ }
+}
+
+void SVCall_Handler(void) {
+ while (1) {
+ }
+}
+
+void DebugMon_Handler(void) {
+ while (1) {
+ }
+}
+
+void PendSV_Handler(void) {
+ while (1) {
+ }
+}
+
+void SysTick_Handler(void) {
+ while (1) {
+ }
+}
+
+//*****************************************************************************
+//
+// Processor ends up here if an unexpected interrupt occurs or a handler
+// is not present in the application code.
+//
+//*****************************************************************************
+
+void IntDefaultHandler(void) {
+ //
+ // Go into an infinite loop.
+ //
+ while (1) {
+ }
+}
diff --git a/software/mpu/src/kernel.c b/software/mpu/src/kernel.c new file mode 100644 index 0000000..71ef57f --- /dev/null +++ b/software/mpu/src/kernel.c @@ -0,0 +1,55 @@ +/*
+ * kernel.c
+ *
+ * Created on: 13.09.2011
+ * Author: Roland
+ */
+#include "Types.h"
+#include "FreeRTOS.h"
+#include "queue.h"
+
+#define kernel_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
+#define kernel_TASK_STACK_SIZE ( ( unsigned short ) 32 )
+
+/* Globals */
+xQueueHandle * gpxQueue_Kernel;
+//static xTaskHandle *pkernel_TaskHandle;
+//static Task_Param_t kernel_Param;
+xTaskHandle *pkernel_TaskHandle;
+Task_Param_t kernel_Param;
+
+/*
+ * Wake up other tasks, send them messages telling what to do,
+ * wait for them to have processed the commands or not, maybe
+ * put them to sleep again, ...
+ * */
+static void kernel_Process_Task(void *Param)
+{
+ Message_t Msg;
+
+ while(1)
+ {
+ xQueueReceive( gpxQueue_Kernel, &Msg, portMAX_DELAY );
+ /*TODO: execute desired command of message */
+
+ /*
+ * switch Msg.Sender
+ *
+ * case Sender_Kernel:
+ * yeah, that's myself
+ *
+ */
+ }
+}
+
+Status_t kernel_Init_Kernel(xQueueHandle * pxQueue)
+{
+ kernel_Param.pxQueue = pxQueue;
+
+ xTaskCreate( kernel_Process_Task, (signed char *) "Kernel",
+ kernel_TASK_STACK_SIZE, &kernel_Param,
+ kernel_TASK_PRIORITY, pkernel_TaskHandle );
+
+ /*TODO: check for success and pass it over to caller. */
+ return STATUS_OK;
+}
diff --git a/software/mpu/src/main.c b/software/mpu/src/main.c new file mode 100644 index 0000000..e23c44b --- /dev/null +++ b/software/mpu/src/main.c @@ -0,0 +1,15 @@ +/*
+===============================================================================
+ Name : main.c
+ Author :
+ Version :
+ Copyright : Copyright (C)
+ Description : main definition
+===============================================================================
+*/
+void boot_Main(void);
+
+int main(void)
+{
+ boot_Main();
+}
diff --git a/software/mpu/src/ssp.c b/software/mpu/src/ssp.c new file mode 100644 index 0000000..0ad3009 --- /dev/null +++ b/software/mpu/src/ssp.c @@ -0,0 +1,263 @@ +/*****************************************************************************
+ * ssp.c: SSP C file for NXP LPC13xx Family Microprocessors
+ *
+ * Copyright(C) 2008, NXP Semiconductor
+ * All rights reserved.
+ *
+ * History
+ * 2008.07.20 ver 1.00 Preliminary version, first Release
+ *
+*****************************************************************************/
+#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
+//#include "gpio.h"
+#include "ssp.h"
+
+/* statistics of all the interrupts */
+volatile uint32_t interruptRxStat = 0;
+volatile uint32_t interruptOverRunStat = 0;
+volatile uint32_t interruptRxTimeoutStat = 0;
+
+/*****************************************************************************
+** Function name: SSP_IRQHandler
+**
+** Descriptions: SSP port is used for SPI communication.
+** SSP interrupt handler
+** The algorithm is, if RXFIFO is at least half full,
+** start receive until it's empty; if TXFIFO is at least
+** half empty, start transmit until it's full.
+** This will maximize the use of both FIFOs and performance.
+**
+** parameters: None
+** Returned value: None
+**
+*****************************************************************************/
+void SSP_IRQHandler(void)
+{
+ uint32_t regValue;
+
+ regValue = LPC_SSP->MIS;
+ if ( regValue & SSPMIS_RORMIS ) /* Receive overrun interrupt */
+ {
+ interruptOverRunStat++;
+ LPC_SSP->ICR = SSPICR_RORIC; /* clear interrupt */
+ }
+ if ( regValue & SSPMIS_RTMIS ) /* Receive timeout interrupt */
+ {
+ interruptRxTimeoutStat++;
+ LPC_SSP->ICR = SSPICR_RTIC; /* clear interrupt */
+ }
+
+ /* please be aware that, in main and ISR, CurrentRxIndex and CurrentTxIndex
+ are shared as global variables. It may create some race condition that main
+ and ISR manipulate these variables at the same time. SSPSR_BSY checking (polling)
+ in both main and ISR could prevent this kind of race condition */
+ if ( regValue & SSPMIS_RXMIS ) /* Rx at least half full */
+ {
+ interruptRxStat++; /* receive until it's empty */
+ }
+ return;
+
+ /*
+ * TODO: Send Message */
+}
+
+/*****************************************************************************
+** Function name: SSPInit
+**
+** Descriptions: SSP port initialization routine
+**
+** parameters: None
+** Returned value: None
+**
+*****************************************************************************/
+void SSPInit( void )
+{
+ uint8_t i, Dummy=Dummy;
+
+ LPC_SYSCON->PRESETCTRL |= (0x1<<0);
+ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<11);
+ LPC_SYSCON->SSPCLKDIV = 0x02; /* Divided by 2 */
+ LPC_IOCON->PIO0_8 &= ~0x07; /* SSP I/O config */
+ LPC_IOCON->PIO0_8 |= 0x01; /* SSP MISO */
+ LPC_IOCON->PIO0_9 &= ~0x07;
+ LPC_IOCON->PIO0_9 |= 0x01; /* SSP MOSI */
+#ifdef __JTAG_DISABLED
+ LPC_IOCON->SCKLOC = 0x00;
+ LPC_IOCON->JTAG_TCK_PIO0_10 &= ~0x07;
+ LPC_IOCON->JTAG_TCK_PIO0_10 |= 0x02; /* SSP CLK */
+#endif
+
+#if 1
+ /* On HummingBird 1(HB1), SSP CLK can be routed to different pins,
+ other than JTAG TCK, it's either P2.11 func. 1 or P0.6 func. 2. */
+ LPC_IOCON->SCKLOC = 0x01;
+ LPC_IOCON->PIO2_11 = 0x01;/* P2.11 function 1 is SSP clock, need to combined
+ with IOCONSCKLOC register setting */
+#else
+ LPC_IOCON->SCKLOC = 0x02;
+ LPC_IOCON->PIO0_6 = 0x02; /* P0.6 function 2 is SSP clock, need to combined
+ with IOCONSCKLOC register setting */
+#endif
+
+#if USE_CS
+ LPC_IOCON->PIO0_2 &= ~0x07;
+ LPC_IOCON->PIO0_2 |= 0x01; /* SSP SSEL */
+#else
+ LPC_IOCON->PIO0_2 &= ~0x07; /* SSP SSEL is a GPIO pin */
+ /* port0, bit 2 is set to GPIO output and high */
+ GPIOSetDir( PORT0, 2, 1 );
+ GPIOSetValue( PORT0, 2, 1 );
+#endif
+
+ /* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15 */
+ LPC_SSP->CR0 = 0x0707;
+
+ /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
+ LPC_SSP->CPSR = 0x2;
+
+ for ( i = 0; i < FIFOSIZE; i++ )
+ {
+ Dummy = LPC_SSP->DR; /* clear the RxFIFO */
+ }
+
+ /* Enable the SSP Interrupt */
+ NVIC_EnableIRQ(SSP_IRQn);
+
+ /* Device select as master, SSP Enabled */
+#if LOOPBACK_MODE
+ LPC_SSP->CR1 = SSPCR1_LBM | SSPCR1_SSE;
+#else
+#if SSP_SLAVE
+ /* Slave mode */
+ if ( LPC_SSP->CR1 & SSPCR1_SSE )
+ {
+ /* The slave bit can't be set until SSE bit is zero. */
+ LPC_SSP->CR1 &= ~SSPCR1_SSE;
+ }
+ LPC_SSP->CR1 = SSPCR1_MS; /* Enable slave bit first */
+ LPC_SSP->CR1 |= SSPCR1_SSE; /* Enable SSP */
+#else
+ /* Master mode */
+ LPC_SSP->CR1 = SSPCR1_SSE;
+#endif
+#endif
+ /* Set SSPINMS registers to enable interrupts */
+ /* enable all error related interrupts */
+ LPC_SSP->IMSC = SSPIMSC_RORIM | SSPIMSC_RTIM;
+ return;
+}
+
+/*****************************************************************************
+** Function name: SSPSend
+**
+** Descriptions: Send a block of data to the SSP port, the
+** first parameter is the buffer pointer, the 2nd
+** parameter is the block length.
+**
+** parameters: buffer pointer, and the block length
+** Returned value: None
+**
+*****************************************************************************/
+void SSPSend( uint8_t *buf, uint32_t Length )
+{
+ uint32_t i;
+ uint8_t Dummy = Dummy;
+
+ for ( i = 0; i < Length; i++ )
+ {
+ /* Move on only if NOT busy and TX FIFO not full. */
+ while ( (LPC_SSP->SR & (SSPSR_TNF|SSPSR_BSY)) != SSPSR_TNF );
+ LPC_SSP->DR = *buf;
+ buf++;
+#if !LOOPBACK_MODE
+ while ( (LPC_SSP->SR & (SSPSR_BSY|SSPSR_RNE)) != SSPSR_RNE );
+ /* Whenever a byte is written, MISO FIFO counter increments, Clear FIFO
+ on MISO. Otherwise, when SSP0Receive() is called, previous data byte
+ is left in the FIFO. */
+ Dummy = LPC_SSP->DR;
+#else
+ /* Wait until the Busy bit is cleared. */
+ while ( LPC_SSP->SR & SSPSR_BSY );
+#endif
+ }
+ return;
+}
+
+/*****************************************************************************
+** Function name: SSPReceive
+** Descriptions: the module will receive a block of data from
+** the SSP, the 2nd parameter is the block
+** length.
+** parameters: buffer pointer, and block length
+** Returned value: None
+**
+*****************************************************************************/
+void SSPReceive( uint8_t *buf, uint32_t Length )
+{
+ uint32_t i;
+
+ for ( i = 0; i < Length; i++ )
+ {
+ /* As long as Receive FIFO is not empty, I can always receive. */
+ /* If it's a loopback test, clock is shared for both TX and RX,
+ no need to write dummy byte to get clock to get the data */
+ /* if it's a peer-to-peer communication, SSPDR needs to be written
+ before a read can take place. */
+#if !LOOPBACK_MODE
+#if SSP_SLAVE
+ while ( !(LPC_SSP->SR & SSPSR_RNE) );
+#else
+ LPC_SSP->DR = 0xFF;
+ /* Wait until the Busy bit is cleared */
+ while ( (LPC_SSP->SR & (SSPSR_BSY|SSPSR_RNE)) != SSPSR_RNE );
+#endif
+#else
+ while ( !(LPC_SSP->SR & SSPSR_RNE) );
+#endif
+ *buf = LPC_SSP->DR;
+ buf++;
+
+ }
+ return;
+}
+/*****************************************************************************/
+void LoopbackTest( void )
+{
+ uint32_t i;
+
+#if !USE_CS
+ /* Set SSEL pin to output low. */
+ GPIOSetValue( PORT0, 2, 0 );
+#endif
+ i = 0;
+ while ( i <= SSP_BUFSIZE )
+ {
+ /* to check the RXIM and TXIM interrupt, I send a block data at one time
+ based on the FIFOSIZE(8). */
+ SSPSend( (uint8_t *)&src_addr[i], FIFOSIZE );
+ /* If RX interrupt is enabled, below receive routine can be
+ also handled inside the ISR. */
+ SSPReceive( (uint8_t *)&dest_addr[i], FIFOSIZE );
+ i += FIFOSIZE;
+ }
+#if !USE_CS
+ /* Set SSEL pin to output high. */
+ GPIOSetValue( PORT0, 2, 1 );
+#endif
+
+ /* verifying write and read data buffer. */
+ for ( i = 0; i < SSP_BUFSIZE; i++ )
+ {
+ if ( src_addr[i] != dest_addr[i] )
+ {
+ while( 1 ); /* Verification failed */
+ }
+ }
+ return;
+}
+
+
+/******************************************************************************
+** End Of File
+******************************************************************************/
+
diff --git a/software/mpu/src/test_ssp.c b/software/mpu/src/test_ssp.c new file mode 100644 index 0000000..7097caa --- /dev/null +++ b/software/mpu/src/test_ssp.c @@ -0,0 +1,7 @@ +/*
+ * test_ssp.c
+ *
+ * Created on: 13.09.2011
+ * Author: Roland
+ */
+
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