diff options
| author | Christian Pointner <equinox@mur.at> | 2013-05-28 19:22:38 +0000 |
|---|---|---|
| committer | Christian Pointner <equinox@mur.at> | 2013-05-28 19:22:38 +0000 |
| commit | 3ab7176e463268a471eb0e90c8520be4ff15a42f (patch) | |
| tree | 24f228d74d9bdd4f5db2e9ea6009364b09f0f5d8 /software/mpu | |
| parent | DRC passes (diff) | |
moved old FreeRTOS based MPU Softeware to mpu.old
git-svn-id: https://svn.spreadspace.org/mur.sat@768 7de4ea59-55d0-425e-a1af-a3118ea81d4c
Diffstat (limited to 'software/mpu')
| -rw-r--r-- | software/mpu/.cproject | 448 | ||||
| -rw-r--r-- | software/mpu/.project | 81 | ||||
| -rw-r--r-- | software/mpu/MurSatMPU Debug.launch | 32 | ||||
| -rw-r--r-- | software/mpu/MurSatMPU Release.launch | 28 | ||||
| -rw-r--r-- | software/mpu/inc/FreeRTOSConfig.h | 108 | ||||
| -rw-r--r-- | software/mpu/inc/Types.h | 45 | ||||
| -rw-r--r-- | software/mpu/inc/ssp.h | 112 | ||||
| -rw-r--r-- | software/mpu/src/adc.c | 250 | ||||
| -rw-r--r-- | software/mpu/src/adc.h | 35 | ||||
| -rw-r--r-- | software/mpu/src/boot.c | 78 | ||||
| -rw-r--r-- | software/mpu/src/camera.c | 62 | ||||
| -rw-r--r-- | software/mpu/src/cr_startup_lpc13.c | 367 | ||||
| -rw-r--r-- | software/mpu/src/kernel.c | 117 | ||||
| -rw-r--r-- | software/mpu/src/lightsens.c | 116 | ||||
| -rw-r--r-- | software/mpu/src/main.c | 20 | ||||
| -rw-r--r-- | software/mpu/src/ssp.c | 263 | ||||
| -rw-r--r-- | software/mpu/src/test_ssp.c | 7 | ||||
| -rw-r--r-- | software/mpu/src/uart.c | 198 | ||||
| -rw-r--r-- | software/mpu/src/uart.h | 55 |
19 files changed, 0 insertions, 2422 deletions
diff --git a/software/mpu/.cproject b/software/mpu/.cproject deleted file mode 100644 index 2b5261c..0000000 --- a/software/mpu/.cproject +++ /dev/null @@ -1,448 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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-<peripheralInstance derived_from="LPC11_13_PMU" determined="infoFile" id="PMU" location="0x40038000"/>
-<peripheralInstance derived_from="LPC11_13_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
-<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/>
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-<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/>
-<peripheralInstance derived_from="LPC11_13_USBDEV" determined="infoFile" id="USB" location="0x40020000"/>
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diff --git a/software/mpu/.project b/software/mpu/.project deleted file mode 100644 index fafd42f..0000000 --- a/software/mpu/.project +++ /dev/null @@ -1,81 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
- <name>MurSatMPU</name>
- <comment></comment>
- <projects>
- </projects>
- <buildSpec>
- <buildCommand>
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- <triggers>clean,full,incremental,</triggers>
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- <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
- <value>all</value>
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- <dictionary>
- <key>org.eclipse.cdt.make.core.buildArguments</key>
- <value></value>
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- <value>make</value>
- </dictionary>
- <dictionary>
- <key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/MurSatMPU/Debug}</value>
- </dictionary>
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diff --git a/software/mpu/MurSatMPU Debug.launch b/software/mpu/MurSatMPU Debug.launch deleted file mode 100644 index 5b51271..0000000 --- a/software/mpu/MurSatMPU Debug.launch +++ /dev/null @@ -1,32 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<launchConfiguration type="com.crt.ctrlcenter.idleNative2">
-<stringAttribute key=".gdbinit" value=""/>
-<stringAttribute key="com.crt.ctrlcenter.targetbase" value="NXP LPC1300 (*)"/>
-<stringAttribute key="com.crt.ctrlcenter.targetconfig" value="<?xml version="1.0" encoding="UTF-8"?> <config chipvendor="NXP" genname="NXP LPC1300" id="config.gdb.stub"><parameters><params><param description="Enter as XTAL[,PLL]. PLL is optional. Values are in kHz" name="Crystal (XTAL) frequency and PLL value" required="false" type="nullString" var="xtal.hz"/> </params> <initValue value="false" var="vector.catch"/> <params><param default="true" description="Vector catch" name="Vector catch" value="false" var="vector.catch"><enum value="True"/> <enum value="False"/> </param> </params> <params><param default="true" description="Enable Red Trace" name="Enable Red Trace " value="true" var="swv.enable"><enum value="true"/> <enum value="false"/> </param> </params> <params><param default="Auto" description="Enablement of semihosting support" name="Semihosting support" value="Auto" var="internal.semihost"><enum value="On"/> <enum value="Off"/> <enum value="Auto"/> </param> </params> <params><param default="" description="Switch debug interface between SWD and JTAG (leave blank for default [SWD])" name="Debug interface" option="" value="" var="internal.debug.interface"><enum value=""/> <enum value="JTAG"/> <enum value="SWD"/> </param> </params> <params><param default="" description="Maximum wire speed in KHz (leave blank to Auto-detect). Not all values are supported by all targets" name="Maximum wire speed" type="nullString" value="" var="emu.speed"><enum value=""/> <enum value="30000"/> <enum value="15000"/> <enum value="10000"/> <enum value="7500"/> <enum value="6000"/> <enum value="5000"/> <enum value="3750"/> <enum value="3000"/> <enum value="2500"/> <enum value="2000"/> <enum value="1500"/> <enum value="1250"/> <enum value="1200"/> <enum value="1000"/> <enum value="750"/> <enum value="600"/> <enum value="500"/> <enum value="400"/> <enum value="300"/> <enum value="250"/> <enum value="200"/> <enum value="150"/> </param> </params> <params><param default="" description="Additional options" name="Additional options" value="" var="misc.options"/> <param default="2" description="Set stub debug level (1-4)" name="Debug Level " value="2" var="debug.level"/> <param default="True" description="when True, executable image will be loaded into the target" name="Load image" type="boolean" value="True" var="load"><enum value="True"/> <enum value="False"/> </param> <param default="cont" description="Run, continue or (do nothing)" name="Run/Continue image" value="cont" var="run"><enum value="run"/> <enum value="cont"/> <enum value=""/> </param> <param default="off" description="If on is specified, make the debugger treat unknown memory as non-existent and refuse \naccesses to such memory. If off is specified, treat the memory as RAM" name="Memory Access Checking" value="off" var="mem.access"><enum value="on"/> <enum value="off"/> </param> <param default="cont" description="choose the disconnect behavior for the target" name="Disconnect behavior" value="cont" var="ondisconnect"><enum value="nochange"/> <enum value="stop"/> <enum value="cont"/> <enum value="run_cont"/> </param> </params> </parameters> <script emulators="${gdb.stub} -mi -info-emu" silent="false" swv="true" type="init">set remotetimeout 60000&#x0A;target extended-remote | ${gdb.stub} -g -mi -${debug.level:2} ${-c+speed:$null} ${-s+emu.speed:$null} ${-p+package:$null} ${-e+emulator:$null} ${vector.catch?-vc:} ${misc.options}&#x0A;set mem inaccessible-by-default ${mem.access}&#x0A;mon ondisconnect ${ondisconnect}&#x0A;set arm force-mode thumb&#x0A;${load}</script> <script silent="false" type="run">${run}</script> </config> "/>
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diff --git a/software/mpu/MurSatMPU Release.launch b/software/mpu/MurSatMPU Release.launch deleted file mode 100644 index 8183be3..0000000 --- a/software/mpu/MurSatMPU Release.launch +++ /dev/null @@ -1,28 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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-<stringAttribute key=".gdbinit" value=""/>
-<stringAttribute key="com.crt.ctrlcenter.targetbase" value="NXP LPC1300 (*)"/>
-<stringAttribute key="com.crt.ctrlcenter.targetconfig" value="<?xml version="1.0" encoding="UTF-8"?> <config chipvendor="NXP" genname="NXP LPC1300" id="config.gdb.stub"><parameters><params><param description="Enter as XTAL[,PLL]. PLL is optional. Values are in kHz" name="Crystal (XTAL) frequency and PLL value" required="false" type="nullString" var="xtal.hz"/> </params> <initValue value="false" var="vector.catch"/> <params><param default="true" description="Vector catch" name="Vector catch" value="false" var="vector.catch"><enum value="True"/> <enum value="False"/> </param> </params> <params><param default="true" description="Enable Red Trace" name="Enable Red Trace " value="true" var="swv.enable"><enum value="true"/> <enum value="false"/> </param> </params> <params><param default="Auto" description="Enablement of semihosting support" name="Semihosting support" value="Auto" var="internal.semihost"><enum value="On"/> <enum value="Off"/> <enum value="Auto"/> </param> </params> <params><param default="" description="Switch debug interface between SWD and JTAG (leave blank for default [SWD])" name="Debug interface" option="" value="" var="internal.debug.interface"><enum value=""/> <enum value="JTAG"/> <enum value="SWD"/> </param> </params> <params><param default="" description="Maximum wire speed in KHz (leave blank to Auto-detect). Not all values are supported by all targets" name="Maximum wire speed" type="nullString" value="" var="emu.speed"><enum value=""/> <enum value="30000"/> <enum value="15000"/> <enum value="10000"/> <enum value="7500"/> <enum value="6000"/> <enum value="5000"/> <enum value="3750"/> <enum value="3000"/> <enum value="2500"/> <enum value="2000"/> <enum value="1500"/> <enum value="1250"/> <enum value="1200"/> <enum value="1000"/> <enum value="750"/> <enum value="600"/> <enum value="500"/> <enum value="400"/> <enum value="300"/> <enum value="250"/> <enum value="200"/> <enum value="150"/> </param> </params> <params><param default="" description="Additional options" name="Additional options" value="" var="misc.options"/> <param default="2" description="Set stub debug level (1-4)" name="Debug Level " value="2" var="debug.level"/> <param default="True" description="when True, executable image will be loaded into the target" name="Load image" type="boolean" value="True" var="load"><enum value="True"/> <enum value="False"/> </param> <param default="cont" description="Run, continue or (do nothing)" name="Run/Continue image" value="cont" var="run"><enum value="run"/> <enum value="cont"/> <enum value=""/> </param> <param default="off" description="If on is specified, make the debugger treat unknown memory as non-existent and refuse \naccesses to such memory. If off is specified, treat the memory as RAM" name="Memory Access Checking" value="off" var="mem.access"><enum value="on"/> <enum value="off"/> </param> <param default="cont" description="choose the disconnect behavior for the target" name="Disconnect behavior" value="cont" var="ondisconnect"><enum value="nochange"/> <enum value="stop"/> <enum value="cont"/> <enum value="run_cont"/> </param> </params> </parameters> <script emulators="${gdb.stub} -mi -info-emu" silent="false" swv="true" type="init">set remotetimeout 60000&#x0A;target extended-remote | ${gdb.stub} -g -mi -${debug.level:2} ${-c+speed:$null} ${-s+emu.speed:$null} ${-p+package:$null} ${-e+emulator:$null} ${vector.catch?-vc:} ${misc.options}&#x0A;set mem inaccessible-by-default ${mem.access}&#x0A;mon ondisconnect ${ondisconnect}&#x0A;set arm force-mode thumb&#x0A;${load}</script> <script silent="false" type="run">${run}</script> </config> "/>
-<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
-<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>
-<booleanAttribute key="org.eclipse.cdt.debug.mi.core.breakpointsFullPath" value="false"/>
-<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="com.crt.ctrlcenter.cmdfactory"/>
-<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
-<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.crt.ctrlcenter.CRTEmbeddedCDebugger"/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
-<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
-<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Release\MurSatMPU.axf"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="MurSatMPU"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.crt.advproject.config.exe.release.1384247445"/>
-<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="false"/>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-<listEntry value="/MurSatMPU"/>
-</listAttribute>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-<listEntry value="4"/>
-</listAttribute>
-</launchConfiguration>
diff --git a/software/mpu/inc/FreeRTOSConfig.h b/software/mpu/inc/FreeRTOSConfig.h deleted file mode 100644 index 5ddf25c..0000000 --- a/software/mpu/inc/FreeRTOSConfig.h +++ /dev/null @@ -1,108 +0,0 @@ -/*
- FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- ***NOTE*** The exception to the GPL is included to allow you to distribute
- a combined work that includes FreeRTOS without being obliged to provide the
- source code for proprietary components outside of the FreeRTOS kernel.
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-/******************************************************************************
- See http://www.freertos.org/a00110.html for an explanation of the
- definitions contained in this file.
-******************************************************************************/
-
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-#include "LPC13xx.h"
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *----------------------------------------------------------*/
-
-extern unsigned int SystemCoreClock;
-
-#define configUSE_PREEMPTION 1
-#define configUSE_IDLE_HOOK 0
-#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
-#define configUSE_TICK_HOOK 0
-#define configCPU_CLOCK_HZ ( ( unsigned long ) SystemCoreClock )
-#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 100 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 2 * 1024 ) )
-#define configMAX_TASK_NAME_LEN ( 12 )
-#define configUSE_TRACE_FACILITY 0
-#define configUSE_16_BIT_TICKS 0
-#define configIDLE_SHOULD_YIELD 0
-#define configUSE_CO_ROUTINES 0
-#define configUSE_MUTEXES 1
-
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
-
-#define configUSE_COUNTING_SEMAPHORES 1
-#define configUSE_ALTERNATIVE_API 0
-#define configCHECK_FOR_STACK_OVERFLOW 0
-#define configUSE_RECURSIVE_MUTEXES 0
-#define configQUEUE_REGISTRY_SIZE 0
-#define configGENERATE_RUN_TIME_STATS 0
-#define configUSE_MALLOC_FAILED_HOOK 0
-
-/* Set the following definitions to 1 to include the API function, or zero
-to exclude the API function. */
-
-#define INCLUDE_vTaskPrioritySet 1
-#define INCLUDE_uxTaskPriorityGet 1
-#define INCLUDE_vTaskDelete 1
-#define INCLUDE_vTaskCleanUpResources 0
-#define INCLUDE_vTaskSuspend 1
-#define INCLUDE_vTaskDelayUntil 1
-#define INCLUDE_vTaskDelay 1
-#define INCLUDE_uxTaskGetStackHighWaterMark 0
-
-/* Use the system definition, if there is one */
-#ifdef __NVIC_PRIO_BITS
- #define configPRIO_BITS __NVIC_PRIO_BITS
-#else
- #define configPRIO_BITS 5 /* 32 priority levels */
-#endif
-
-/* The lowest priority. */
-#define configKERNEL_INTERRUPT_PRIORITY ( 31 << (8 - configPRIO_BITS) )
-/* Priority 5, or 160 as only the top three bits are implemented. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 << (8 - configPRIO_BITS) )
-
-
-
-#endif /* FREERTOS_CONFIG_H */
-
diff --git a/software/mpu/inc/Types.h b/software/mpu/inc/Types.h deleted file mode 100644 index 9cb0101..0000000 --- a/software/mpu/inc/Types.h +++ /dev/null @@ -1,45 +0,0 @@ -#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-
-#define MS(ms) portTICK_RATE_MS * (ms)
-
-/* Status_t*/
-typedef enum
-{
- STATUS_OK = 0x0U,
- STATUS_ERROR_INIT,
- STATUS_ERROR_SND,
- STATUS_ERROR_RCV,
- STATUS_ERROR_TIMEOUT
-}Status_t;
-
-/* Sender_t */
-typedef enum
-{
- Sender_Kernel = 0x0,
- Sender_Camera,
- Sender_Spi,
- Sender_LightSens,
- Sender_UART
-}Sender_t;
-
-/* Message_t */
-typedef struct
-{
- void *pData;
- Sender_t Sender;
-}Message_t;
-
-typedef struct
-{
- xQueueHandle hxq_Kernel;
- xQueueHandle hxq_Camera;
- xQueueHandle hxq_LightSens;
-}QH_t;
-
-typedef struct
-{
- xTaskHandle hxTask_Self;
- QH_t QueueHandles;
-}Task_Param_t;
diff --git a/software/mpu/inc/ssp.h b/software/mpu/inc/ssp.h deleted file mode 100644 index e910a4d..0000000 --- a/software/mpu/inc/ssp.h +++ /dev/null @@ -1,112 +0,0 @@ -/*****************************************************************************
- * ssp.h: Header file for NXP LPC134x Family Microprocessors
- *
- * Copyright(C) 2006, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2006.07.19 ver 1.00 Preliminary version, first Release
- *
-******************************************************************************/
-#ifndef __SSP_H__
-#define __SSP_H__
-
-/* There are there modes in SSP: loopback, master or slave. */
-/* Here are the combination of all the tests.
-(1) LOOPBACK test: LOOPBACK_MODE=1, TX_RX_ONLY=0, USE_CS=1;
-(2) Serial EEPROM test: LOOPBACK_MODE=0, TX_RX_ONLY=0, USE_CS=0; (default)
-(3) TX(Master) Only: LOOPBACK_MODE=0, SSP_SLAVE=0, TX_RX_ONLY=1, USE_CS=1;
-(4) RX(Slave) Only: LOOPBACK_MODE=0, SSP_SLAVE=1, TX_RX_ONLY=0, USE_CS=1 */
-
-#define LOOPBACK_MODE 1 /* 1 is loopback, 0 is normal operation. */
-#define SSP_SLAVE 0 /* 1 is SLAVE mode, 0 is master mode */
-#define TX_RX_ONLY 0 /* 1 is TX or RX only depending on SSP_SLAVE
- flag, 0 is either loopback mode or communicate
- with a serial EEPROM. */
-
-/* if USE_CS is zero, set SSEL as GPIO that you have total control of the sequence */
-/* When test serial SEEPROM(LOOPBACK_MODE=0, TX_RX_ONLY=0), set USE_CS to 0. */
-/* When LOOPBACK_MODE=1 or TX_RX_ONLY=1, set USE_CS to 1. */
-
-#define USE_CS 1
-#define SSP_DEBUG 0
-
-/* SPI read and write buffer size */
-#define SSP_BUFSIZE 16
-#define FIFOSIZE 8
-
-#define DELAY_COUNT 10
-#define MAX_TIMEOUT 0xFF
-
-/* Port0.2 is the SSP select pin */
-#define SSP0_SEL (1 << 2)
-
-/* SSP Status register */
-#define SSPSR_TFE (1 << 0)
-#define SSPSR_TNF (1 << 1)
-#define SSPSR_RNE (1 << 2)
-#define SSPSR_RFF (1 << 3)
-#define SSPSR_BSY (1 << 4)
-
-/* SSP CR0 register */
-#define SSPCR0_DSS (1 << 0)
-#define SSPCR0_FRF (1 << 4)
-#define SSPCR0_SPO (1 << 6)
-#define SSPCR0_SPH (1 << 7)
-#define SSPCR0_SCR (1 << 8)
-
-/* SSP CR1 register */
-#define SSPCR1_LBM (1 << 0)
-#define SSPCR1_SSE (1 << 1)
-#define SSPCR1_MS (1 << 2)
-#define SSPCR1_SOD (1 << 3)
-
-/* SSP Interrupt Mask Set/Clear register */
-#define SSPIMSC_RORIM (1 << 0)
-#define SSPIMSC_RTIM (1 << 1)
-#define SSPIMSC_RXIM (1 << 2)
-#define SSPIMSC_TXIM (1 << 3)
-
-/* SSP0 Interrupt Status register */
-#define SSPRIS_RORRIS (1 << 0)
-#define SSPRIS_RTRIS (1 << 1)
-#define SSPRIS_RXRIS (1 << 2)
-#define SSPRIS_TXRIS (1 << 3)
-
-/* SSP0 Masked Interrupt register */
-#define SSPMIS_RORMIS (1 << 0)
-#define SSPMIS_RTMIS (1 << 1)
-#define SSPMIS_RXMIS (1 << 2)
-#define SSPMIS_TXMIS (1 << 3)
-
-/* SSP0 Interrupt clear register */
-#define SSPICR_RORIC (1 << 0)
-#define SSPICR_RTIC (1 << 1)
-
-/* ATMEL SEEPROM command set */
-#define WREN 0x06 /* MSB A8 is set to 0, simplifying test */
-#define WRDI 0x04
-#define RDSR 0x05
-#define WRSR 0x01
-#define READ 0x03
-#define WRITE 0x02
-
-/* RDSR status bit definition */
-#define RDSR_RDY 0x01
-#define RDSR_WEN 0x02
-
-/* If RX_INTERRUPT is enabled, the SSP RX will be handled in the ISR
-SSPReceive() will not be needed. */
-extern void SSP_IRQHandler (void);
-extern void SSPInit( void );
-extern void SSPSend( uint8_t *Buf, uint32_t Length );
-extern void SSPReceive( uint8_t *buf, uint32_t Length );
-
-extern uint8_t src_addr[SSP_BUFSIZE];
-extern uint8_t dest_addr[SSP_BUFSIZE];
-extern void LoopbackTest( void );
-#endif /* __SSP_H__ */
-/*****************************************************************************
-** End Of File
-******************************************************************************/
-
diff --git a/software/mpu/src/adc.c b/software/mpu/src/adc.c deleted file mode 100644 index 1c1f45a..0000000 --- a/software/mpu/src/adc.c +++ /dev/null @@ -1,250 +0,0 @@ -/*****************************************************************************
- * main.c: Main C file for NXP LPC13xx Family Microprocessors
- *
- * Copyright(C) 2008, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2008.07.20 ver 1.00 Preliminary version, first Release
- *
-*****************************************************************************/
-#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
-#include "adc.h"
-
-volatile uint32_t ADCValue[ADC_NUM];
-volatile uint32_t ADCIntDone = 0;
-
-#if BURST_MODE
-volatile uint32_t channel_flag;
-#endif
-
-#if ADC_INTERRUPT_FLAG
-/******************************************************************************
-** Function name: ADC_IRQHandler
-**
-** Descriptions: ADC interrupt handler
-**
-** parameters: None
-** Returned value: None
-**
-******************************************************************************/
-void ADC_IRQHandler (void)
-{
- uint32_t regVal;
-
- LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
- regVal = LPC_ADC->STAT; /* Read ADC will clear the interrupt */
- if ( regVal & 0x0000FF00 ) /* check OVERRUN error first */
- {
- regVal = (regVal & 0x0000FF00) >> 0x08;
- /* if overrun, just read ADDR to clear */
- /* regVal variable has been reused. */
- switch ( regVal )
- {
- case 0x01:
- regVal = LPC_ADC->DR0;
- break;
- case 0x02:
- regVal = LPC_ADC->DR1;
- break;
- case 0x04:
- regVal = LPC_ADC->DR2;
- break;
- case 0x08:
- regVal = LPC_ADC->DR3;
- break;
- case 0x10:
- regVal = LPC_ADC->DR4;
- break;
- case 0x20:
- regVal = LPC_ADC->DR5;
- break;
- case 0x40:
- regVal = LPC_ADC->DR6;
- break;
- case 0x80:
- regVal = LPC_ADC->DR7;
- break;
- default:
- break;
- }
- LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
- ADCIntDone = 1;
- return;
- }
-
- if ( regVal & ADC_ADINT )
- {
- switch ( regVal & 0xFF ) /* check DONE bit */
- {
- case 0x01:
- ADCValue[0] = ( LPC_ADC->DR0 >> 6 ) & 0x3FF;
- break;
- case 0x02:
- ADCValue[1] = ( LPC_ADC->DR1 >> 6 ) & 0x3FF;
- break;
- case 0x04:
- ADCValue[2] = ( LPC_ADC->DR2 >> 6 ) & 0x3FF;
- break;
- case 0x08:
- ADCValue[3] = ( LPC_ADC->DR3 >> 6 ) & 0x3FF;
- break;
- case 0x10:
- ADCValue[4] = ( LPC_ADC->DR4 >> 6 ) & 0x3FF;
- break;
- case 0x20:
- ADCValue[5] = ( LPC_ADC->DR5 >> 6 ) & 0x3FF;
- break;
- case 0x40:
- ADCValue[6] = ( LPC_ADC->DR6 >> 6 ) & 0x3FF;
- break;
- case 0x80:
- ADCValue[7] = ( LPC_ADC->DR7 >> 6 ) & 0x3FF;
- break;
- default:
- break;
- }
-#if BURST_MODE
- channel_flag |= (regVal & 0xFF);
- if ( (channel_flag & 0xFF) == 0xFF )
- {
- /* All the bits in have been set, it indicates all the ADC
- channels have been converted. */
- LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
- }
-#endif
- ADCIntDone = 1;
- }
- return;
-}
-#endif
-
-/*****************************************************************************
-** Function name: ADCInit
-**
-** Descriptions: initialize ADC channel
-**
-** parameters: ADC clock rate
-** Returned value: None
-**
-*****************************************************************************/
-void ADCInit( uint32_t ADC_Clk )
-{
- /* Disable Power down bit to the ADC block. */
- LPC_SYSCON->PDRUNCFG &= ~(0x1<<4);
-
- /* Enable AHB clock to the ADC. */
- LPC_SYSCON->SYSAHBCLKCTRL |= (1<<13);
-
- /* Unlike some other pings, for ADC test, all the pins need
- to set to analog mode. Bit 7 needs to be cleared according
- to design team. */
-#ifdef __JTAG_DISABLED
- LPC_IOCON->JTAG_TDI_PIO0_11 &= ~0x8F; /* ADC I/O config */
- LPC_IOCON->JTAG_TDI_PIO0_11 |= 0x02; /* ADC IN0 */
- LPC_IOCON->JTAG_TMS_PIO1_0 &= ~0x8F;
- LPC_IOCON->JTAG_TMS_PIO1_0 |= 0x02; /* ADC IN1 */
- LPC_IOCON->JTAG_TDO_PIO1_1 &= ~0x8F;
- LPC_IOCON->JTAG_TDO_PIO1_1 |= 0x02; /* ADC IN2 */
- LPC_IOCON->JTAG_nTRST_PIO1_2 &= ~0x8F;
- LPC_IOCON->JTAG_nTRST_PIO1_2 |= 0x02; /* ADC IN3 */
-#ifdef __SWD_DISABLED
- LPC_IOCON->ARM_SWDIO_PIO1_3 &= ~0x8F;
- LPC_IOCON->ARM_SWDIO_PIO1_3 |= 0x02; /* ADC IN4 */
-#endif
-#endif
- LPC_IOCON->JTAG_TDI_PIO0_11 = 0x02; // Select AD0 pin function
- LPC_IOCON->JTAG_TMS_PIO1_0 = 0x02; // Select AD1 pin function
- LPC_IOCON->JTAG_TDO_PIO1_1 = 0x02; // Select AD2 pin function
- LPC_IOCON->JTAG_nTRST_PIO1_2 = 0x02; // Select AD3 pin function
-// LPC_IOCON->ARM_SWDIO_PIO1_3 = 0x02; // Select AD4 pin function
- LPC_IOCON->PIO1_4 = 0x01; // Select AD5 pin function
- LPC_IOCON->PIO1_10 = 0x01; // Select AD6 pin function
- LPC_IOCON->PIO1_11 = 0x01; // Select AD7 pin function
-
- LPC_ADC->CR = ((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_Clk-1)<<8;
-
- /* If POLLING, no need to do the following */
-#if ADC_INTERRUPT_FLAG
- NVIC_EnableIRQ(ADC_IRQn);
- LPC_ADC->INTEN = 0x1FF; /* Enable all interrupts */
-#endif
- return;
-}
-
-/*****************************************************************************
-** Function name: ADCRead
-**
-** Descriptions: Read ADC channel
-**
-** parameters: Channel number
-** Returned value: Value read, if interrupt driven, return channel #
-**
-*****************************************************************************/
-uint32_t ADCRead( uint8_t channelNum )
-{
-#if !ADC_INTERRUPT_FLAG
- uint32_t regVal, ADC_Data;
-#endif
-
- /* channel number is 0 through 7 */
- if ( channelNum >= ADC_NUM )
- {
- channelNum = 0; /* reset channel number to 0 */
- }
- LPC_ADC->CR &= 0xFFFFFF00; // clear channel selection
- LPC_ADC->CR |= (1 << 24) | (1 << channelNum);
- /* switch channel,start A/D convert */
-#if !ADC_INTERRUPT_FLAG
- while ( 1 ) /* wait until end of A/D convert */
- {
- regVal = *(volatile unsigned long *)(LPC_ADC_BASE
- + ADC_OFFSET + ADC_INDEX * channelNum);
- /* read result of A/D conversion */
- if ( regVal & ADC_DONE )
- {
- break;
- }
- }
-
- LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
- if ( regVal & ADC_OVERRUN ) /* save data when it's not overrun, otherwise, return zero */
- {
- return ( 0 );
- }
- ADC_Data = ( regVal >> 6 ) & 0x3FF;
- return ( ADC_Data ); /* return A/D conversion value */
-#else
- return ( channelNum ); /* if it's interrupt driven, the ADC reading is
- done inside the handler. so, return channel number */
-#endif
-}
-
-/*****************************************************************************
-** Function name: ADC0BurstRead
-**
-** Descriptions: Use burst mode to convert multiple channels once.
-**
-** parameters: None
-** Returned value: None
-**
-*****************************************************************************/
-void ADCBurstRead( void )
-{
- if ( LPC_ADC->CR & (0x7<<24) )
- {
- LPC_ADC->CR &= ~(0x7<<24);
- }
- /* Test channel 5,6,7 using burst mode because they are not shared
- with the JTAG pins. */
- LPC_ADC->CR &= ~0xFF;
- /* Read all channels, 0 through 7. */
- LPC_ADC->CR |= (0xFF);
- LPC_ADC->CR |= (0x1<<16); /* Set burst mode and start A/D convert */
- return; /* the ADC reading is done inside the
- handler, return 0. */
-}
-
-/*********************************************************************************
-** End Of File
-*********************************************************************************/
diff --git a/software/mpu/src/adc.h b/software/mpu/src/adc.h deleted file mode 100644 index 682b8eb..0000000 --- a/software/mpu/src/adc.h +++ /dev/null @@ -1,35 +0,0 @@ -/*****************************************************************************
- * adc.h: Header file for NXP LPC134x Family Microprocessors
- *
- * Copyright(C) 2008, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2008.07.19 ver 1.00 Preliminary version, first Release
- *
-******************************************************************************/
-#ifndef __ADC_H
-#define __ADC_H
-
-#define ADC_INTERRUPT_FLAG 0 /* 1 is interrupt driven, 0 is polling */
-#define BURST_MODE 0 /* Burst mode works in interrupt driven mode only. */
-#define ADC_DEBUG 1
-
-#define ADC_OFFSET 0x10
-#define ADC_INDEX 4
-
-#define ADC_DONE 0x80000000
-#define ADC_OVERRUN 0x40000000
-#define ADC_ADINT 0x00010000
-
-#define ADC_NUM 8 /* for LPC13xx */
-#define ADC_CLK 4500000 /* set to 4.5Mhz */
-
-extern void ADC_IRQHandler( void );
-extern void ADCInit( uint32_t ADC_Clk );
-extern uint32_t ADCRead( uint8_t channelNum );
-extern void ADCBurstRead( void );
-#endif /* end __ADC_H */
-/*****************************************************************************
-** End Of File
-******************************************************************************/
diff --git a/software/mpu/src/boot.c b/software/mpu/src/boot.c deleted file mode 100644 index 825aac5..0000000 --- a/software/mpu/src/boot.c +++ /dev/null @@ -1,78 +0,0 @@ -/*
- * boot.c
- *
- * Created on: 13.09.2011
- * Author: Roland
- */
-
-#include "Types.h"
-#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-
-#define NUM_QUEUE_ITEMS_KERNEL ((unsigned long) 2)
-#define NUM_QUEUE_ITEMS_CAMERA ((unsigned long) 2)
-#define NUM_QUEUE_ITEMS_LIGHTSENS ((unsigned long) 2)
-
-Status_t kernel_Init_Kernel(QH_t xQueues);
-Status_t camera_Init_Camera(QH_t xQueues);
-Status_t lightsens_Init_LightSens(QH_t xQueues);
-
-void UARTInit(uint32_t baudrate);
-
-/*
- * Globals */
-volatile QH_t qh;
-
-Status_t boot_Init_Kernel(QH_t xQueues)
-{
- return kernel_Init_Kernel( xQueues );
-}
-Status_t boot_Init_Camera(QH_t xQueues)
-{
- return camera_Init_Camera( xQueues );
-}
-Status_t boot_Init_LightSens(QH_t xQueues)
-{
- return lightsens_Init_LightSens( xQueues );
-}
-
-Status_t boot_CreateQueues( xQueueHandle *phxQueue_Kernel,
- xQueueHandle *phxQueue_Camera,
- xQueueHandle *phxQueue_LightSens)
-{
- *phxQueue_Kernel = xQueueCreate(NUM_QUEUE_ITEMS_KERNEL, sizeof(Message_t));
- *phxQueue_Camera = xQueueCreate(NUM_QUEUE_ITEMS_CAMERA, sizeof(Message_t));
- *phxQueue_LightSens = xQueueCreate(NUM_QUEUE_ITEMS_LIGHTSENS, sizeof(Message_t));
-
- return STATUS_OK;
-
-}
-void boot_Main(void)
-{
- /*
- *
- * */
-
- xQueueHandle hxQueue_Kernel;
- xQueueHandle hxQueue_Camera;
- xQueueHandle hxQueue_LightSens;
-
- Status_t Status;
-
- Status = boot_CreateQueues(&hxQueue_Kernel, &hxQueue_Camera, &hxQueue_LightSens);
-
- qh.hxq_Kernel = hxQueue_Kernel;
- qh.hxq_Camera = hxQueue_Camera;
- qh.hxq_LightSens = hxQueue_LightSens;
-
- Status = boot_Init_Kernel(qh);
- Status = boot_Init_Camera(qh);
- Status = boot_Init_LightSens(qh);
-
- UARTInit(115200);
-
- /* Start the tasks. */
- vTaskStartScheduler();
-}
-
diff --git a/software/mpu/src/camera.c b/software/mpu/src/camera.c deleted file mode 100644 index 8ec62d3..0000000 --- a/software/mpu/src/camera.c +++ /dev/null @@ -1,62 +0,0 @@ -/*
- * camera.c
- *
- * Created on: 23.10.2011
- * Author: Roland
- */
-
-#include "Types.h"
-#include "FreeRTOS.h"
-#include "queue.h"
-
-#define TASK_PRIORITY_camera ( tskIDLE_PRIORITY + 2 )
-#define TASK_STACK_SIZE_camera ( ( unsigned short ) 64 )
-
-/* Globals */
-static Task_Param_t TaskParam_Camera;
-
-/*
- * The camera is connected to the MPU vie I2C to control the camera,
- * and has a 8 bit bus for data transmission ...
- * */
-static void camera_Process_Task(void *Param)
-{
- Message_t Msg;
- portCHAR chMsgBufCam[10] = "Hello Kl!";
-
- if(NULL == TaskParam_Camera.QueueHandles.hxq_Camera)
- {
- return;
- }
-
- while(1)
- {
- if( xQueueReceive( TaskParam_Camera.QueueHandles.hxq_Camera, &Msg, MS(5) ))
- {
- switch (Msg.Sender)
- {
- case Sender_Kernel:
- {
- Msg.Sender = Sender_Camera;
- Msg.pData = chMsgBufCam;
- xQueueSend(TaskParam_Camera.QueueHandles.hxq_Kernel, &Msg, MS(10));
- }
- default: {;} /* for the time being we ignore messages received from
- someone other than the kernel. */
- }
- }
- }
-}
-
-Status_t camera_Init_Camera(QH_t hxQueues)
-{
- TaskParam_Camera.QueueHandles = hxQueues;
-
- if(!xTaskCreate( camera_Process_Task, (signed char *) "Camera",
- TASK_STACK_SIZE_camera, &TaskParam_Camera,
- TASK_PRIORITY_camera, &(TaskParam_Camera.hxTask_Self)))
- return STATUS_ERROR_INIT;
-
- /*TODO: check for success and pass it over to caller. */
- return STATUS_OK;
-}
diff --git a/software/mpu/src/cr_startup_lpc13.c b/software/mpu/src/cr_startup_lpc13.c deleted file mode 100644 index 48a9784..0000000 --- a/software/mpu/src/cr_startup_lpc13.c +++ /dev/null @@ -1,367 +0,0 @@ -//*****************************************************************************
-// +--+
-// | ++----+
-// +-++ |
-// | |
-// +-+--+ |
-// | +--+--+
-// +----+ Copyright (c) 2009-10 Code Red Technologies Ltd.
-//
-// Microcontroller Startup code for use with Red Suite
-//
-// Software License Agreement
-//
-// The software is owned by Code Red Technologies and/or its suppliers, and is
-// protected under applicable copyright laws. All rights are reserved. Any
-// use in violation of the foregoing restrictions may subject the user to criminal
-// sanctions under applicable laws, as well as to civil liability for the breach
-// of the terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
-// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
-// CODE RED TECHNOLOGIES LTD.
-//
-//*****************************************************************************
-#if defined (__cplusplus)
-#ifdef __REDLIB__
-#error Redlib does not support C++
-#else
-//*****************************************************************************
-//
-// The entry point for the C++ library startup
-//
-//*****************************************************************************
-extern "C" {
- extern void __libc_init_array(void);
-}
-#endif
-#endif
-
-#define WEAK __attribute__ ((weak))
-#define ALIAS(f) __attribute__ ((weak, alias (#f)))
-
-// Code Red - if CMSIS is being used, then SystemInit() routine
-// will be called by startup code rather than in application's main()
-#if defined (__USE_CMSIS)
-#include "system_LPC13xx.h"
-#endif
-
-//*****************************************************************************
-#if defined (__cplusplus)
-extern "C" {
-#endif
-
-//*****************************************************************************
-//
-// Forward declaration of the default handlers. These are aliased.
-// When the application defines a handler (with the same name), this will
-// automatically take precedence over these weak definitions
-//
-//*****************************************************************************
-void ResetISR(void);
-WEAK void NMI_Handler(void);
-WEAK void HardFault_Handler(void);
-WEAK void MemManage_Handler(void);
-WEAK void BusFault_Handler(void);
-WEAK void UsageFault_Handler(void);
-WEAK void SVCall_Handler(void);
-WEAK void DebugMon_Handler(void);
-WEAK void PendSV_Handler(void);
-WEAK void SysTick_Handler(void);
-WEAK void IntDefaultHandler(void);
-//*****************************************************************************
-//
-// Forward declaration of the specific IRQ handlers. These are aliased
-// to the IntDefaultHandler, which is a 'forever' loop. When the application
-// defines a handler (with the same name), this will automatically take
-// precedence over these weak definitions
-//
-//*****************************************************************************
-
-void I2C_IRQHandler(void) ALIAS(IntDefaultHandler);
-void TIMER16_0_IRQHandler(void) ALIAS(IntDefaultHandler);
-void TIMER16_1_IRQHandler(void) ALIAS(IntDefaultHandler);
-void TIMER32_0_IRQHandler(void) ALIAS(IntDefaultHandler);
-void TIMER32_1_IRQHandler(void) ALIAS(IntDefaultHandler);
-void SSP_IRQHandler(void) ALIAS(IntDefaultHandler);
-void UART_IRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_FIQHandler(void) ALIAS(IntDefaultHandler);
-void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
-void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
-void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
-void FMC_IRQHandler(void) ALIAS(IntDefaultHandler);
-void PIOINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
-void PIOINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
-void PIOINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
-void PIOINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
-void WAKEUP_IRQHandler(void) ALIAS(IntDefaultHandler);
-
-extern void xPortSysTickHandler(void);
-extern void xPortPendSVHandler(void);
-extern void vPortSVCHandler( void );
-
-//*****************************************************************************
-//
-// The entry point for the application.
-// __main() is the entry point for Redlib based applications
-// main() is the entry point for Newlib based applications
-//
-//*****************************************************************************
-#if defined (__REDLIB__)
-extern void __main(void);
-#endif
-extern int main(void);
-//*****************************************************************************
-//
-// External declaration for the pointer to the stack top from the Linker Script
-//
-//*****************************************************************************
-extern void _vStackTop(void);
-
-//*****************************************************************************
-#if defined (__cplusplus)
-} // extern "C"
-#endif
-//*****************************************************************************
-//
-// The vector table. Note that the proper constructs must be placed on this to
-// ensure that it ends up at physical address 0x0000.0000.
-//
-//*****************************************************************************
-extern void (* const g_pfnVectors[])(void);
-__attribute__ ((section(".isr_vector")))
-void (* const g_pfnVectors[])(void) = {
- // Core Level - CM3
- &_vStackTop, // The initial stack pointer
- ResetISR, // The reset handler
- NMI_Handler, // The NMI handler
- HardFault_Handler, // The hard fault handler
- MemManage_Handler, // The MPU fault handler
- BusFault_Handler, // The bus fault handler
- UsageFault_Handler, // The usage fault handler
- 0, // Reserved
- 0, // Reserved
- 0, // Reserved
- 0, // Reserved
- vPortSVCHandler, // SVCall handler
- DebugMon_Handler, // Debug monitor handler
- 0, // Reserved
- xPortPendSVHandler, // The PendSV handler
- xPortSysTickHandler, // The SysTick handler
-
-
- // Wakeup sources (40 ea.) for the I/O pins:
- // PIO0 (0:11)
- // PIO1 (0:11)
- // PIO2 (0:11)
- // PIO3 (0:3)
- WAKEUP_IRQHandler, // PIO0_0 Wakeup
- WAKEUP_IRQHandler, // PIO0_1 Wakeup
- WAKEUP_IRQHandler, // PIO0_2 Wakeup
- WAKEUP_IRQHandler, // PIO0_3 Wakeup
- WAKEUP_IRQHandler, // PIO0_4 Wakeup
- WAKEUP_IRQHandler, // PIO0_5 Wakeup
- WAKEUP_IRQHandler, // PIO0_6 Wakeup
- WAKEUP_IRQHandler, // PIO0_7 Wakeup
- WAKEUP_IRQHandler, // PIO0_8 Wakeup
- WAKEUP_IRQHandler, // PIO0_9 Wakeup
- WAKEUP_IRQHandler, // PIO0_10 Wakeup
- WAKEUP_IRQHandler, // PIO0_11 Wakeup
-
- WAKEUP_IRQHandler, // PIO1_0 Wakeup
- WAKEUP_IRQHandler, // PIO1_1 Wakeup
- WAKEUP_IRQHandler, // PIO1_2 Wakeup
- WAKEUP_IRQHandler, // PIO1_3 Wakeup
- WAKEUP_IRQHandler, // PIO1_4 Wakeup
- WAKEUP_IRQHandler, // PIO1_5 Wakeup
- WAKEUP_IRQHandler, // PIO1_6 Wakeup
- WAKEUP_IRQHandler, // PIO1_7 Wakeup
- WAKEUP_IRQHandler, // PIO1_8 Wakeup
- WAKEUP_IRQHandler, // PIO1_9 Wakeup
- WAKEUP_IRQHandler, // PIO1_10 Wakeup
- WAKEUP_IRQHandler, // PIO1_11 Wakeup
-
- WAKEUP_IRQHandler, // PIO2_0 Wakeup
- WAKEUP_IRQHandler, // PIO2_1 Wakeup
- WAKEUP_IRQHandler, // PIO2_2 Wakeup
- WAKEUP_IRQHandler, // PIO2_3 Wakeup
- WAKEUP_IRQHandler, // PIO2_4 Wakeup
- WAKEUP_IRQHandler, // PIO2_5 Wakeup
- WAKEUP_IRQHandler, // PIO2_6 Wakeup
- WAKEUP_IRQHandler, // PIO2_7 Wakeup
- WAKEUP_IRQHandler, // PIO2_8 Wakeup
- WAKEUP_IRQHandler, // PIO2_9 Wakeup
- WAKEUP_IRQHandler, // PIO2_10 Wakeup
- WAKEUP_IRQHandler, // PIO2_11 Wakeup
-
- WAKEUP_IRQHandler, // PIO3_0 Wakeup
- WAKEUP_IRQHandler, // PIO3_1 Wakeup
- WAKEUP_IRQHandler, // PIO3_2 Wakeup
- WAKEUP_IRQHandler, // PIO3_3 Wakeup
-
- I2C_IRQHandler, // I2C0
- TIMER16_0_IRQHandler, // CT16B0 (16-bit Timer 0)
- TIMER16_1_IRQHandler, // CT16B1 (16-bit Timer 1)
- TIMER32_0_IRQHandler, // CT32B0 (32-bit Timer 0)
- TIMER32_1_IRQHandler, // CT32B1 (32-bit Timer 1)
- SSP_IRQHandler, // SSP0
- UART_IRQHandler, // UART0
-
- USB_IRQHandler, // USB IRQ
- USB_FIQHandler, // USB FIQ
-
- ADC_IRQHandler, // ADC (A/D Converter)
- WDT_IRQHandler, // WDT (Watchdog Timer)
- BOD_IRQHandler, // BOD (Brownout Detect)
- FMC_IRQHandler, // Flash (IP2111 Flash Memory Controller)
- PIOINT3_IRQHandler, // PIO INT3
- PIOINT2_IRQHandler, // PIO INT2
- PIOINT1_IRQHandler, // PIO INT1
- PIOINT0_IRQHandler, // PIO INT0
-
- };
-
-//*****************************************************************************
-//
-// The following are constructs created by the linker, indicating where the
-// the "data" and "bss" segments reside in memory. The initializers for the
-// for the "data" segment resides immediately following the "text" segment.
-//
-//*****************************************************************************
-extern unsigned long _etext;
-extern unsigned long _data;
-extern unsigned long _edata;
-extern unsigned long _bss;
-extern unsigned long _ebss;
-
-//*****************************************************************************
-//
-// This is the code that gets called when the processor first starts execution
-// following a reset event. Only the absolutely necessary set is performed,
-// after which the application supplied entry() routine is called. Any fancy
-// actions (such as making decisions based on the reset cause register, and
-// resetting the bits in that register) are left solely in the hands of the
-// application.
-//
-//*****************************************************************************
-void
-ResetISR(void) {
- unsigned long *pulSrc, *pulDest;
-
- //
- // Copy the data segment initializers from flash to SRAM.
- //
- pulSrc = &_etext;
- for (pulDest = &_data; pulDest < &_edata;) {
- *pulDest++ = *pulSrc++;
- }
-
- //
- // Zero fill the bss segment. This is done with inline assembly since this
- // will clear the value of pulDest if it is not kept in a register.
- //
- __asm(" ldr r0, =_bss\n"
- " ldr r1, =_ebss\n"
- " mov r2, #0\n"
- " .thumb_func\n"
- "zero_loop:\n"
- " cmp r0, r1\n"
- " it lt\n"
- " strlt r2, [r0], #4\n"
- " blt zero_loop");
-
-#ifdef __USE_CMSIS
- SystemInit();
-#endif
-
-#if defined (__cplusplus)
- //
- // Call C++ library initialisation
- //
- __libc_init_array();
-#endif
-
-#if defined (__REDLIB__)
- // Call the Redlib library, which in turn calls main()
- __main() ;
-#else
- main();
-#endif
- //
- // main() shouldn't return, but if it does, we'll just enter an infinite loop
- //
- while (1) {
- ;
- }
-}
-
-//*****************************************************************************
-//
-// This is the code that gets called when the processor receives a NMI. This
-// simply enters an infinite loop, preserving the system state for examination
-// by a debugger.
-//
-//*****************************************************************************
-void NMI_Handler(void) {
- while (1) {
- }
-}
-
-void HardFault_Handler(void) {
- while (1) {
- }
-}
-
-void MemManage_Handler(void) {
- while (1) {
- }
-}
-
-void BusFault_Handler(void) {
- while (1) {
- }
-}
-
-void UsageFault_Handler(void) {
- while (1) {
- }
-}
-
-void SVCall_Handler(void) {
- while (1) {
- }
-}
-
-void DebugMon_Handler(void) {
- while (1) {
- }
-}
-
-void PendSV_Handler(void) {
- while (1) {
- }
-}
-
-void SysTick_Handler(void) {
- while (1) {
- }
-}
-
-//*****************************************************************************
-//
-// Processor ends up here if an unexpected interrupt occurs or a handler
-// is not present in the application code.
-//
-//*****************************************************************************
-
-void IntDefaultHandler(void) {
- //
- // Go into an infinite loop.
- //
- while (1) {
- }
-}
diff --git a/software/mpu/src/kernel.c b/software/mpu/src/kernel.c deleted file mode 100644 index f5d04ea..0000000 --- a/software/mpu/src/kernel.c +++ /dev/null @@ -1,117 +0,0 @@ -/*
- * kernel.c
- *
- * Created on: 13.09.2011
- * Author: Roland
- */
-#include "Types.h"
-#include "FreeRTOS.h"
-#include "queue.h"
-#include "uart.h"
-
-#define kernel_TASK_PRIORITY ( tskIDLE_PRIORITY + 5 )
-#define kernel_TASK_STACK_SIZE ( ( unsigned short ) 64 )
-
-void UARTSend(uint8_t *BufferPtr, uint32_t Length);
-
-/* Globals */
-#define BUFSIZE 0x40 // fixme: ...is sdefined in hart.h
-static Task_Param_t kernel_Param;
-extern volatile uint32_t UARTCount;
-extern volatile uint8_t UARTBuffer[BUFSIZE];
-
-/*
- * Wake up other tasks, send them messages telling what to do,
- * wait for them to have processed the commands or not, maybe
- * put them to sleep again, ...
- * */
-static void kernel_Process_Task(void *Param)
-{
- Message_t RcvMsg;
- Message_t SndMsg;
- portTickType tick;
- portCHAR chBufCam[10] = "Seas Cam!";
- portCHAR chBufLSen[10] = "Seas LSe!";
- portCHAR l = 'l';
-
- if(NULL == kernel_Param.QueueHandles.hxq_Kernel)
- {
- return;
- }
-
- tick = xTaskGetTickCount();
- while(1)
- {
- vTaskDelayUntil(&tick, MS(3));
-
- if( xQueueReceive( kernel_Param.QueueHandles.hxq_Kernel, &RcvMsg, MS(5)))
- {
- /*
- * switch Msg.Sender and act accordingly.
- */
- switch (RcvMsg.Sender)
- {
- case Sender_Camera:
- {
- SndMsg.Sender = Sender_Kernel;
- SndMsg.pData = chBufCam;
- xQueueSend(kernel_Param.QueueHandles.hxq_Camera, &SndMsg, MS(10));
- break;
- }
-
- case Sender_LightSens:
- {
- SndMsg.Sender = Sender_Kernel;
- SndMsg.pData = chBufLSen;
- for(l = 0; l < 8; l ++)
- {
- UARTBuffer[l*4 +0] = 48+(((uint8_t *)(RcvMsg.pData))[l])%1000 / 100;
- UARTBuffer[l*4 +1] = 48+(((uint8_t *)(RcvMsg.pData))[l])%100 / 10;
- UARTBuffer[l*4 +2] = 48+(((uint8_t *)(RcvMsg.pData))[l])%10;
- UARTBuffer[l*4 +3] = ' ';
- }
- UARTCount = 34;
- UARTBuffer[32] = '\r';
- UARTBuffer[33] = '\n';
- UARTSend( (uint8_t *)UARTBuffer, UARTCount );
-// UARTSend( (uint8_t *)(RcvMsg.pData), 10 );
-// xQueueSend(kernel_Param.QueueHandles.hxq_LightSens, &SndMsg, MS(10));
- break;
- }
- case Sender_UART:
- {
- if (UARTBuffer[UARTCount-1] != 'i')
- break;
- if ( UARTCount != 0 )
- {
- LPC_UART->IER = IER_THRE | IER_RLS; /* Disable RBR */
- UARTSend( (uint8_t *)UARTBuffer, UARTCount );
- UARTCount = 0;
- LPC_UART->IER = IER_THRE | IER_RLS | IER_RBR; /* Re-enable RBR */
-
- l = 'r';
- SndMsg.pData = &l;
-
- xQueueSend(kernel_Param.QueueHandles.hxq_LightSens, &SndMsg, MS(10));
- }
- break;
- }
- default: {;}
- }
- }
- }
-}
-
-Status_t kernel_Init_Kernel(QH_t hxQueues)
-{
-portBASE_TYPE xResult;
-
- xResult = xTaskCreate( kernel_Process_Task, (signed char *) "Kernel",
- kernel_TASK_STACK_SIZE, &kernel_Param,
- kernel_TASK_PRIORITY, &(kernel_Param.hxTask_Self) );
-
- kernel_Param.QueueHandles = hxQueues;
-
- /*TODO: check for success and pass it over to caller. */
- return STATUS_OK;
-}
diff --git a/software/mpu/src/lightsens.c b/software/mpu/src/lightsens.c deleted file mode 100644 index ed280f0..0000000 --- a/software/mpu/src/lightsens.c +++ /dev/null @@ -1,116 +0,0 @@ -/*
- * lightsens.c
- *
- * Created on: 23.10.2011
- * Author: Roland
- */
-
-#include "Types.h"
-#include "FreeRTOS.h"
-#include "queue.h"
-#include "adc.h"
-
-#define LED_PORT 0 // Port for led
-#define LED_BIT 7 // Bit on port for led
-
-#define TASK_PRIORITY_lightsens ( tskIDLE_PRIORITY + 2 )
-#define TASK_STACK_SIZE_lightsens ( ( unsigned short ) 64 )
-
-
-/* Debug Helper */
-Status_t lightsens_ValueToString()
-{
-}
-
-/* Globals */
-static Task_Param_t TaskParam_LightSens;
-
-/*
- * Wake up other tasks, send them messages telling what to do,
- * wait for them to have processed the commands or not, maybe
- * put them to sleep again, ...
- * */
-static void lightsens_Process_Task(void *Param)
-{
- Message_t Msg;
- portCHAR chBufLSe[10] = "Seas Knl!";
-
- portCHAR led;
-
- portCHAR i;
-// volatile uint32_t ADCValue[ADC_NUM];
- uint32_t ADCValue[ADC_NUM];
-
- // set led port to output
- LPC_GPIO0->DIR |= 1<<LED_BIT;
-
- if(NULL == TaskParam_LightSens.QueueHandles.hxq_LightSens)
- {
- return;
- }
-
- Msg.Sender = Sender_LightSens;
- Msg.pData = chBufLSe;
- xQueueSend(TaskParam_LightSens.QueueHandles.hxq_Kernel, &Msg, MS(10));
-
- /* Initialize ADC */
- ADCInit( ADC_CLK );
- for ( i = 0; i < ADC_NUM; i++ )
- {
- ADCValue[i] = ADCRead( i ); /* Polling */
- }
-
- while(1)
- {
- if( xQueueReceive( TaskParam_LightSens.QueueHandles.hxq_LightSens, &Msg, MS(5)))
- {
- /*
- * switch Msg.Sender
- *
- */
- switch (Msg.Sender)
- {
- case Sender_Kernel:
- {
- if (((portCHAR*)(Msg.pData))[0] == 'l')
- {
- if(led)
- led = 0;
- else
- led = 1<<LED_BIT;
-
-
- // LPC_GPIO0->MASKED_ACCESS[(1<<LED_BIT)] = led;
- }
- if(((portCHAR*)(Msg.pData))[0] == 'r')
- {
- for ( i = 0; i < ADC_NUM; i++ )
- {
- ADCValue[i] = ADCRead( i ); /* Polling */
- }
- }
-
- Msg.Sender = Sender_LightSens;
- Msg.pData = chBufLSe;
- Msg.pData = ADCValue;
- xQueueSend(TaskParam_LightSens.QueueHandles.hxq_Kernel, &Msg, MS(10));
- }
- default: {;} /* for the time being we ignore messages received from
- someone other than the kernel. */
- }
- }
- }
-}
-
-Status_t lightsens_Init_LightSens(QH_t hxQueues)
-{
- TaskParam_LightSens.QueueHandles = hxQueues;
-
- if(!xTaskCreate( lightsens_Process_Task, (signed char *) "LightSensor",
- TASK_STACK_SIZE_lightsens, &TaskParam_LightSens,
- TASK_PRIORITY_lightsens, &(TaskParam_LightSens.hxTask_Self)))
- return STATUS_ERROR_INIT;
-
- /*TODO: check for success and pass it over to caller. */
- return STATUS_OK;
-}
diff --git a/software/mpu/src/main.c b/software/mpu/src/main.c deleted file mode 100644 index e7f69f1..0000000 --- a/software/mpu/src/main.c +++ /dev/null @@ -1,20 +0,0 @@ -/*
-===============================================================================
- Name : main.c
- Author :
- Version :
- Copyright : Copyright (C)
- Description : main definition
-===============================================================================
-*/
-void boot_Main(void);
-
-int main(void)
-{
-#if 1
- boot_Main();
-#endif
-
- /* If we ever reach this point, then there is something very wrong. */
- return -1;
-}
diff --git a/software/mpu/src/ssp.c b/software/mpu/src/ssp.c deleted file mode 100644 index 0ad3009..0000000 --- a/software/mpu/src/ssp.c +++ /dev/null @@ -1,263 +0,0 @@ -/*****************************************************************************
- * ssp.c: SSP C file for NXP LPC13xx Family Microprocessors
- *
- * Copyright(C) 2008, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2008.07.20 ver 1.00 Preliminary version, first Release
- *
-*****************************************************************************/
-#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
-//#include "gpio.h"
-#include "ssp.h"
-
-/* statistics of all the interrupts */
-volatile uint32_t interruptRxStat = 0;
-volatile uint32_t interruptOverRunStat = 0;
-volatile uint32_t interruptRxTimeoutStat = 0;
-
-/*****************************************************************************
-** Function name: SSP_IRQHandler
-**
-** Descriptions: SSP port is used for SPI communication.
-** SSP interrupt handler
-** The algorithm is, if RXFIFO is at least half full,
-** start receive until it's empty; if TXFIFO is at least
-** half empty, start transmit until it's full.
-** This will maximize the use of both FIFOs and performance.
-**
-** parameters: None
-** Returned value: None
-**
-*****************************************************************************/
-void SSP_IRQHandler(void)
-{
- uint32_t regValue;
-
- regValue = LPC_SSP->MIS;
- if ( regValue & SSPMIS_RORMIS ) /* Receive overrun interrupt */
- {
- interruptOverRunStat++;
- LPC_SSP->ICR = SSPICR_RORIC; /* clear interrupt */
- }
- if ( regValue & SSPMIS_RTMIS ) /* Receive timeout interrupt */
- {
- interruptRxTimeoutStat++;
- LPC_SSP->ICR = SSPICR_RTIC; /* clear interrupt */
- }
-
- /* please be aware that, in main and ISR, CurrentRxIndex and CurrentTxIndex
- are shared as global variables. It may create some race condition that main
- and ISR manipulate these variables at the same time. SSPSR_BSY checking (polling)
- in both main and ISR could prevent this kind of race condition */
- if ( regValue & SSPMIS_RXMIS ) /* Rx at least half full */
- {
- interruptRxStat++; /* receive until it's empty */
- }
- return;
-
- /*
- * TODO: Send Message */
-}
-
-/*****************************************************************************
-** Function name: SSPInit
-**
-** Descriptions: SSP port initialization routine
-**
-** parameters: None
-** Returned value: None
-**
-*****************************************************************************/
-void SSPInit( void )
-{
- uint8_t i, Dummy=Dummy;
-
- LPC_SYSCON->PRESETCTRL |= (0x1<<0);
- LPC_SYSCON->SYSAHBCLKCTRL |= (1<<11);
- LPC_SYSCON->SSPCLKDIV = 0x02; /* Divided by 2 */
- LPC_IOCON->PIO0_8 &= ~0x07; /* SSP I/O config */
- LPC_IOCON->PIO0_8 |= 0x01; /* SSP MISO */
- LPC_IOCON->PIO0_9 &= ~0x07;
- LPC_IOCON->PIO0_9 |= 0x01; /* SSP MOSI */
-#ifdef __JTAG_DISABLED
- LPC_IOCON->SCKLOC = 0x00;
- LPC_IOCON->JTAG_TCK_PIO0_10 &= ~0x07;
- LPC_IOCON->JTAG_TCK_PIO0_10 |= 0x02; /* SSP CLK */
-#endif
-
-#if 1
- /* On HummingBird 1(HB1), SSP CLK can be routed to different pins,
- other than JTAG TCK, it's either P2.11 func. 1 or P0.6 func. 2. */
- LPC_IOCON->SCKLOC = 0x01;
- LPC_IOCON->PIO2_11 = 0x01;/* P2.11 function 1 is SSP clock, need to combined
- with IOCONSCKLOC register setting */
-#else
- LPC_IOCON->SCKLOC = 0x02;
- LPC_IOCON->PIO0_6 = 0x02; /* P0.6 function 2 is SSP clock, need to combined
- with IOCONSCKLOC register setting */
-#endif
-
-#if USE_CS
- LPC_IOCON->PIO0_2 &= ~0x07;
- LPC_IOCON->PIO0_2 |= 0x01; /* SSP SSEL */
-#else
- LPC_IOCON->PIO0_2 &= ~0x07; /* SSP SSEL is a GPIO pin */
- /* port0, bit 2 is set to GPIO output and high */
- GPIOSetDir( PORT0, 2, 1 );
- GPIOSetValue( PORT0, 2, 1 );
-#endif
-
- /* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15 */
- LPC_SSP->CR0 = 0x0707;
-
- /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
- LPC_SSP->CPSR = 0x2;
-
- for ( i = 0; i < FIFOSIZE; i++ )
- {
- Dummy = LPC_SSP->DR; /* clear the RxFIFO */
- }
-
- /* Enable the SSP Interrupt */
- NVIC_EnableIRQ(SSP_IRQn);
-
- /* Device select as master, SSP Enabled */
-#if LOOPBACK_MODE
- LPC_SSP->CR1 = SSPCR1_LBM | SSPCR1_SSE;
-#else
-#if SSP_SLAVE
- /* Slave mode */
- if ( LPC_SSP->CR1 & SSPCR1_SSE )
- {
- /* The slave bit can't be set until SSE bit is zero. */
- LPC_SSP->CR1 &= ~SSPCR1_SSE;
- }
- LPC_SSP->CR1 = SSPCR1_MS; /* Enable slave bit first */
- LPC_SSP->CR1 |= SSPCR1_SSE; /* Enable SSP */
-#else
- /* Master mode */
- LPC_SSP->CR1 = SSPCR1_SSE;
-#endif
-#endif
- /* Set SSPINMS registers to enable interrupts */
- /* enable all error related interrupts */
- LPC_SSP->IMSC = SSPIMSC_RORIM | SSPIMSC_RTIM;
- return;
-}
-
-/*****************************************************************************
-** Function name: SSPSend
-**
-** Descriptions: Send a block of data to the SSP port, the
-** first parameter is the buffer pointer, the 2nd
-** parameter is the block length.
-**
-** parameters: buffer pointer, and the block length
-** Returned value: None
-**
-*****************************************************************************/
-void SSPSend( uint8_t *buf, uint32_t Length )
-{
- uint32_t i;
- uint8_t Dummy = Dummy;
-
- for ( i = 0; i < Length; i++ )
- {
- /* Move on only if NOT busy and TX FIFO not full. */
- while ( (LPC_SSP->SR & (SSPSR_TNF|SSPSR_BSY)) != SSPSR_TNF );
- LPC_SSP->DR = *buf;
- buf++;
-#if !LOOPBACK_MODE
- while ( (LPC_SSP->SR & (SSPSR_BSY|SSPSR_RNE)) != SSPSR_RNE );
- /* Whenever a byte is written, MISO FIFO counter increments, Clear FIFO
- on MISO. Otherwise, when SSP0Receive() is called, previous data byte
- is left in the FIFO. */
- Dummy = LPC_SSP->DR;
-#else
- /* Wait until the Busy bit is cleared. */
- while ( LPC_SSP->SR & SSPSR_BSY );
-#endif
- }
- return;
-}
-
-/*****************************************************************************
-** Function name: SSPReceive
-** Descriptions: the module will receive a block of data from
-** the SSP, the 2nd parameter is the block
-** length.
-** parameters: buffer pointer, and block length
-** Returned value: None
-**
-*****************************************************************************/
-void SSPReceive( uint8_t *buf, uint32_t Length )
-{
- uint32_t i;
-
- for ( i = 0; i < Length; i++ )
- {
- /* As long as Receive FIFO is not empty, I can always receive. */
- /* If it's a loopback test, clock is shared for both TX and RX,
- no need to write dummy byte to get clock to get the data */
- /* if it's a peer-to-peer communication, SSPDR needs to be written
- before a read can take place. */
-#if !LOOPBACK_MODE
-#if SSP_SLAVE
- while ( !(LPC_SSP->SR & SSPSR_RNE) );
-#else
- LPC_SSP->DR = 0xFF;
- /* Wait until the Busy bit is cleared */
- while ( (LPC_SSP->SR & (SSPSR_BSY|SSPSR_RNE)) != SSPSR_RNE );
-#endif
-#else
- while ( !(LPC_SSP->SR & SSPSR_RNE) );
-#endif
- *buf = LPC_SSP->DR;
- buf++;
-
- }
- return;
-}
-/*****************************************************************************/
-void LoopbackTest( void )
-{
- uint32_t i;
-
-#if !USE_CS
- /* Set SSEL pin to output low. */
- GPIOSetValue( PORT0, 2, 0 );
-#endif
- i = 0;
- while ( i <= SSP_BUFSIZE )
- {
- /* to check the RXIM and TXIM interrupt, I send a block data at one time
- based on the FIFOSIZE(8). */
- SSPSend( (uint8_t *)&src_addr[i], FIFOSIZE );
- /* If RX interrupt is enabled, below receive routine can be
- also handled inside the ISR. */
- SSPReceive( (uint8_t *)&dest_addr[i], FIFOSIZE );
- i += FIFOSIZE;
- }
-#if !USE_CS
- /* Set SSEL pin to output high. */
- GPIOSetValue( PORT0, 2, 1 );
-#endif
-
- /* verifying write and read data buffer. */
- for ( i = 0; i < SSP_BUFSIZE; i++ )
- {
- if ( src_addr[i] != dest_addr[i] )
- {
- while( 1 ); /* Verification failed */
- }
- }
- return;
-}
-
-
-/******************************************************************************
-** End Of File
-******************************************************************************/
-
diff --git a/software/mpu/src/test_ssp.c b/software/mpu/src/test_ssp.c deleted file mode 100644 index 7097caa..0000000 --- a/software/mpu/src/test_ssp.c +++ /dev/null @@ -1,7 +0,0 @@ -/*
- * test_ssp.c
- *
- * Created on: 13.09.2011
- * Author: Roland
- */
-
diff --git a/software/mpu/src/uart.c b/software/mpu/src/uart.c deleted file mode 100644 index 6626dfc..0000000 --- a/software/mpu/src/uart.c +++ /dev/null @@ -1,198 +0,0 @@ -/*****************************************************************************
- * uart.c: UART API file for NXP LPC13xx Family Microprocessors
- *
- * Copyright(C) 2008, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2008.08.21 ver 1.00 Preliminary version, first Release
- *
-******************************************************************************/
-#include "LPC13xx.h"
-#include "uart.h"
-
-#include "Types.h"
-#include "FreeRTOS.h"
-#include "queue.h"
-
-
-// CodeRed - change for CMSIS 1.3
-#define SystemFrequency SystemCoreClock
-
-extern volatile QH_t qh;
-
-volatile uint32_t UARTStatus;
-volatile uint8_t UARTTxEmpty = 1;
-volatile uint8_t UARTBuffer[BUFSIZE];
-volatile uint32_t UARTCount = 0;
-
-/*****************************************************************************
-** Function name: UART_IRQHandler
-**
-** Descriptions: UART interrupt handler
-**
-** parameters: None
-** Returned value: None
-**
-*****************************************************************************/
-void UART_IRQHandler(void)
-{
- uint8_t IIRValue, LSRValue;
- uint8_t Dummy = Dummy;
- Message_t SndMsg;
-
- IIRValue = LPC_UART->IIR;
-
- IIRValue >>= 1; /* skip pending bit in IIR */
- IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
- if (IIRValue == IIR_RLS) /* Receive Line Status */
- {
- LSRValue = LPC_UART->LSR;
- /* Receive Line Status */
- if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
- {
- /* There are errors or break interrupt */
- /* Read LSR will clear the interrupt */
- UARTStatus = LSRValue;
- Dummy = LPC_UART->RBR; /* Dummy read on RX to clear
- interrupt, then bail out */
- return;
- }
- if (LSRValue & LSR_RDR) /* Receive Data Ready */
- {
- /* If no error on RLS, normal ready, save into the data buffer. */
- /* Note: read RBR will clear the interrupt */
- UARTBuffer[UARTCount++] = LPC_UART->RBR;
- if (UARTCount == BUFSIZE)
- {
- UARTCount = 0; /* buffer overflow */
- }
- }
- }
- else if (IIRValue == IIR_RDA) /* Receive Data Available */
- {
- /* Receive Data Available */
- UARTBuffer[UARTCount++] = LPC_UART->RBR;
- if (UARTCount == BUFSIZE)
- {
- UARTCount = 0; /* buffer overflow */
- }
- }
- else if (IIRValue == IIR_CTI) /* Character timeout indicator */
- {
- /* Character Time-out indicator */
- UARTStatus |= 0x100; /* Bit 9 as the CTI error */
- }
- else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
- {
- /* THRE interrupt */
- LSRValue = LPC_UART->LSR; /* Check status in the LSR to see if
- valid data in U0THR or not */
- if (LSRValue & LSR_THRE)
- {
- UARTTxEmpty = 1;
- }
- else
- {
- UARTTxEmpty = 0;
- }
- }
- SndMsg.Sender = Sender_UART;
- xQueueSendFromISR(qh.hxq_Kernel, &SndMsg, 0);
-
- return;
-}
-
-/*****************************************************************************
-** Function name: UARTInit
-**
-** Descriptions: Initialize UART0 port, setup pin select,
-** clock, parity, stop bits, FIFO, etc.
-**
-** parameters: UART baudrate
-** Returned value: None
-**
-*****************************************************************************/
-void UARTInit(uint32_t baudrate)
-{
- uint32_t Fdiv;
- uint32_t regVal;
-
- UARTTxEmpty = 1;
- UARTCount = 0;
-
- NVIC_DisableIRQ(UART_IRQn);
-
- LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */
- LPC_IOCON->PIO1_6 |= 0x01; /* UART RXD */
- LPC_IOCON->PIO1_7 &= ~0x07;
- LPC_IOCON->PIO1_7 |= 0x01; /* UART TXD */
- /* Enable UART clock */
- LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
- LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
-
- LPC_UART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
- regVal = LPC_SYSCON->UARTCLKDIV;
- Fdiv = (((SystemFrequency/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ; /*baud rate */
-
- LPC_UART->DLM = Fdiv / 256;
- LPC_UART->DLL = Fdiv % 256;
- LPC_UART->LCR = 0x03; /* DLAB = 0 */
- LPC_UART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
-
- /* Read to clear the line status. */
- regVal = LPC_UART->LSR;
-
- /* Ensure a clean start, no data in either TX or RX FIFO. */
-// CodeRed - added parentheses around comparison in operand of &
- while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
- while ( LPC_UART->LSR & LSR_RDR )
- {
- regVal = LPC_UART->RBR; /* Dump data from RX FIFO */
- }
-
- /* Enable the UART Interrupt */
- NVIC_EnableIRQ(UART_IRQn);
-
-#if TX_INTERRUPT
- LPC_UART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
-#else
- LPC_UART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
-#endif
- return;
-}
-
-/*****************************************************************************
-** Function name: UARTSend
-**
-** Descriptions: Send a block of data to the UART 0 port based
-** on the data length
-**
-** parameters: buffer pointer, and data length
-** Returned value: None
-**
-*****************************************************************************/
-void UARTSend(uint8_t *BufferPtr, uint32_t Length)
-{
-
- while ( Length != 0 )
- {
- /* THRE status, contain valid data */
-#if !TX_INTERRUPT
- while ( !(LPC_UART->LSR & LSR_THRE) );
- LPC_UART->THR = *BufferPtr;
-#else
- /* Below flag is set inside the interrupt handler when THRE occurs. */
- while ( !(UARTTxEmpty & 0x01) );
- LPC_UART->THR = *BufferPtr;
- UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
-#endif
- BufferPtr++;
- Length--;
- }
- return;
-}
-
-/******************************************************************************
-** End Of File
-******************************************************************************/
diff --git a/software/mpu/src/uart.h b/software/mpu/src/uart.h deleted file mode 100644 index ee8f89b..0000000 --- a/software/mpu/src/uart.h +++ /dev/null @@ -1,55 +0,0 @@ -/*****************************************************************************
- * uart.h: Header file for NXP LPC13xx Family Microprocessors
- *
- * Copyright(C) 2008, NXP Semiconductor
- * All rights reserved.
- *
- * History
- * 2008.08.21 ver 1.00 Preliminary version, first Release
- *
-******************************************************************************/
-#ifndef __UART_H
-#define __UART_H
-
-
-#define RS485_ENABLED 0
-#define TX_INTERRUPT 0 /* 0 if TX uses polling, 1 interrupt driven. */
-#define MODEM_TEST 0
-
-#define IER_RBR 0x01
-#define IER_THRE 0x02
-#define IER_RLS 0x04
-
-#define IIR_PEND 0x01
-#define IIR_RLS 0x03
-#define IIR_RDA 0x02
-#define IIR_CTI 0x06
-#define IIR_THRE 0x01
-
-#define LSR_RDR 0x01
-#define LSR_OE 0x02
-#define LSR_PE 0x04
-#define LSR_FE 0x08
-#define LSR_BI 0x10
-#define LSR_THRE 0x20
-#define LSR_TEMT 0x40
-#define LSR_RXFE 0x80
-
-#define BUFSIZE 0x40
-
-/* RS485 mode definition. */
-#define RS485_NMMEN (0x1<<0)
-#define RS485_RXDIS (0x1<<1)
-#define RS485_AADEN (0x1<<2)
-#define RS485_SEL (0x1<<3)
-#define RS485_DCTRL (0x1<<4)
-#define RS485_OINV (0x1<<5)
-
-void UARTInit(uint32_t Baudrate);
-void UART_IRQHandler(void);
-void UARTSend(uint8_t *BufferPtr, uint32_t Length);
-
-#endif /* end __UART_H */
-/*****************************************************************************
-** End Of File
-******************************************************************************/
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