1 files changed, 74 insertions, 0 deletions
diff --git a/software/mpu/src/mpu_main.c b/software/mpu/src/mpu_main.c
new file mode 100644
index 0000000..953b0b2
--- /dev/null
+++ b/software/mpu/src/mpu_main.c
@@ -0,0 +1,74 @@
+/*
+ * mpu_main.c
+ *
+ *  Created on: 24.05.2011
+ *      Author: Roland
+ */
+
+#include "LPC13xx.h"
+#include "gpio/gpio.h"
+#include "ssp/ssp.h"
+
+void LoopbackTest( uint8_t* src_addr, uint8_t* dest_addr );
+void SEEPROMTest( uint8_t* src_addr, uint8_t* dest_addr );
+
+/******************************************************************************
+**   Main Function  main()
+******************************************************************************/
+int main (void)
+{
+	  /* Basic chip initialization is taken care of in SystemInit() called
+	   * from the startup code. SystemInit() and chip settings are defined
+	   * in the CMSIS system_<part family>.c file.
+	   */
+
+  uint32_t i;
+
+  uint8_t src_addr[SSP_BUFSIZE];
+  uint8_t dest_addr[SSP_BUFSIZE];
+
+#if SSP_DEBUG
+  UARTInit(115200);
+#endif
+
+  SSPInit();			/* initialize SSP port, share pins with SPI0
+						on port0(p0.15-18). */
+  for ( i = 0; i < SSP_BUFSIZE; i++ )
+  {
+	src_addr[i] = (uint8_t)i;
+	dest_addr[i] = 0;
+  }
+
+#if TX_RX_ONLY
+  /* For the inter-board communication, one board is set as
+  master transmit, the other is set to slave receive. */
+#if SSP_SLAVE
+  /* Slave receive */
+  SSPReceive( (uint8_t *)dest_addr, SSP_BUFSIZE );
+  for ( i = 0; i < SSP_BUFSIZE; i++ )
+  {
+	if ( src_addr[i] != dest_addr[i] )
+	{
+	  while ( 1 );				/* Verification failure, fatal error */
+	}
+  }
+#else
+  /* Master transmit */
+  SSPSend( (uint8_t *)src_addr, SSP_BUFSIZE);
+#endif
+#else
+  /* TX_RX_ONLY=0, it's either an internal loopback test
+  within SSP peripheral or communicate with a serial EEPROM. */
+#if LOOPBACK_MODE
+  LoopbackTest( src_addr, dest_addr );
+#else
+  SEEPROMTest( src_addr, dest_addr );
+  /* If JTAG TCK is used as SSP clock, change the setting before
+  serial EEPROM test, restore after the test. */
+#ifdef __JTAG_DISABLED
+  LPC_IOCON->JTAG_TCK_PIO0_10 &= ~0x07;	/* Restore JTAG_TCK */
+#endif
+#endif			/* endif NOT LOOPBACK_MODE */
+#endif			/* endif NOT TX_RX_ONLY */
+  return 0;
+}