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Diffstat (limited to 'software/hhd70dongle/util.c')
| -rw-r--r-- | software/hhd70dongle/util.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/software/hhd70dongle/util.c b/software/hhd70dongle/util.c new file mode 100644 index 0000000..b1f7e85 --- /dev/null +++ b/software/hhd70dongle/util.c @@ -0,0 +1,96 @@ +/* + * + * mur.sat + * + * Somewhen in the year 2012, mur.at will have a nano satellite launched + * into a low earth orbit (310 km above the surface of our planet). The + * satellite itself is a TubeSat personal satellite kit, developed and + * launched by interorbital systems. mur.sat is a joint venture of mur.at, + * ESC im Labor and realraum. + * + * Please visit the project hompage at sat.mur.at for further information. + * + * + * Copyright (C) 2012 Bernhard Tittelbach <xro@realraum.at> + * + * This file is part of mur.sat. + * + * mur.sat is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * mur.sat is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with mur.sat. If not, see <http://www.gnu.org/licenses/>. + * + */ +#include <avr/io.h> +#include <avr/interrupt.h> +#include <util/delay.h> +#include "util.h" + +void reset(void) +{ + cli(); + // disable watchdog, if enabled + // disable all peripherals + UDCON = 1; + USBCON = (1<<FRZCLK); // disable USB + UCSR1B = 0; + _delay_ms(5); + #if defined(__AVR_AT90USB162__) // Teensy 1.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; + TIMSK0 = 0; TIMSK1 = 0; UCSR1B = 0; + DDRB = 0; DDRC = 0; DDRD = 0; + PORTB = 0; PORTC = 0; PORTD = 0; + asm volatile("jmp 0x3E00"); + #elif defined(__AVR_ATmega32U4__) // Teensy 2.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0; + DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0; + PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0x7E00"); + #elif defined(__AVR_AT90USB646__) // Teensy++ 1.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; + DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; + PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0xFC00"); + #elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0 + EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; + TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; + DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; + PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; + asm volatile("jmp 0x1FC00"); + #endif +} + +int16_t adc_read(uint8_t mux) +{ + uint8_t low; + char aref = 0b11000000; + ADCSRA = (1<<ADEN) | ADC_PRESCALER; // enable ADC + ADCSRB = (1<<ADHSM) | (mux & 0x20); // high speed mode + ADMUX = aref | (mux & 0x1F); // configure mux input + ADCSRA = (1<<ADEN) | ADC_PRESCALER | (1<<ADSC); // start the conversion + while (ADCSRA & (1<<ADSC)) ; // wait for result + low = ADCL; // must read LSB first + ADCSRA &= ~(1<<ADEN); // disable ADC + return (ADCH << 8) | low; // must read MSB only once! +} + +void debug_sprint_int16hex(uint8_t *buffer, int16_t num) +{ + int c,n; + for (c=0; c<4; c++) + { + n = (num >> (3-c)*4 ) & 15; + buffer[c] = n + ((n < 10) ? '0' : 'A' - 10); + } + buffer[4]=0; +}
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