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Diffstat (limited to 'contrib/kicad-libs/microchip-5.lib')
| -rw-r--r-- | contrib/kicad-libs/microchip-5.lib | 32329 |
1 files changed, 32329 insertions, 0 deletions
diff --git a/contrib/kicad-libs/microchip-5.lib b/contrib/kicad-libs/microchip-5.lib new file mode 100644 index 0000000..af62d82 --- /dev/null +++ b/contrib/kicad-libs/microchip-5.lib @@ -0,0 +1,32329 @@ +EESchema-LIBRARY Version 2.3 29/04/2008-12:23:00 +# Converted with eagle2kicad.ulp Version 0.9 +# Device count = 597 +# +# Dev Name: 24-AA65P +# Package Name: DIL8 +# Dev Tech: AA65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-AA65P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-AA65P" -400 -400 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 -100 350 +P 2 1 0 0 -190 0 -100 0 +P 2 1 0 0 -190 -100 -100 -100 +P 2 1 0 0 -190 -200 -100 -200 +P 2 1 0 0 -400 0 -340 0 +P 2 1 0 0 -400 -100 -340 -100 +P 2 1 0 0 -400 -200 -340 -200 +P 2 1 0 0 -400 300 -340 300 +P 2 1 0 0 500 0 430 0 +P 2 1 0 0 220 0 190 0 +P 2 1 0 0 -40 340 -40 240 +P 2 1 0 0 -40 40 -40 -260 +P 2 1 0 0 -100 240 -40 240 +P 2 1 0 0 -150 300 -100 300 +P 2 1 0 0 -100 40 -40 40 +T 1 115 -15 70 0 1 0 Array +T 0 365 335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-AA65SM +# Package Name: SO-08M +# Dev Tech: AA65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-AA65SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-AA65SM" -400 -400 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 -100 350 +P 2 1 0 0 -190 0 -100 0 +P 2 1 0 0 -190 -100 -100 -100 +P 2 1 0 0 -190 -200 -100 -200 +P 2 1 0 0 -400 0 -340 0 +P 2 1 0 0 -400 -100 -340 -100 +P 2 1 0 0 -400 -200 -340 -200 +P 2 1 0 0 -400 300 -340 300 +P 2 1 0 0 500 0 430 0 +P 2 1 0 0 220 0 190 0 +P 2 1 0 0 -40 340 -40 240 +P 2 1 0 0 -40 40 -40 -260 +P 2 1 0 0 -100 240 -40 240 +P 2 1 0 0 -150 300 -100 300 +P 2 1 0 0 -100 40 -40 40 +T 1 115 -15 70 0 1 0 Array +T 0 365 335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-C32P +# Package Name: DIL8 +# Dev Tech: C32 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-C32P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-C32P" -400 -400 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 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1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-C32SM +# Package Name: SO-08M +# Dev Tech: C32 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-C32SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-C32SM" -400 -400 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 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1 +# +DEF 24-C65P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-C65P" -400 -400 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 -100 350 +P 2 1 0 0 -190 0 -100 0 +P 2 1 0 0 -190 -100 -100 -100 +P 2 1 0 0 -190 -200 -100 -200 +P 2 1 0 0 -400 0 -340 0 +P 2 1 0 0 -400 -100 -340 -100 +P 2 1 0 0 -400 -200 -340 -200 +P 2 1 0 0 -400 300 -340 300 +P 2 1 0 0 500 0 430 0 +P 2 1 0 0 220 0 190 0 +P 2 1 0 0 -40 340 -40 240 +P 2 1 0 0 -40 40 -40 -260 +P 2 1 0 0 -100 240 -40 240 +P 2 1 0 0 -150 300 -100 300 +P 2 1 0 0 -100 40 -40 40 +T 1 115 -15 70 0 1 0 Array +T 0 365 335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-C65SM +# Package Name: SO-08M +# Dev Tech: C65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-C65SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-C65SM" -400 -400 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 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3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-FC32P +# Package Name: DIL8 +# Dev Tech: FC32 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-FC32P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-FC32P" -400 -400 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 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Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-FC32SM" -400 -400 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 -100 350 +P 2 1 0 0 -190 0 -100 0 +P 2 1 0 0 -190 -100 -100 -100 +P 2 1 0 0 -190 -200 -100 -200 +P 2 1 0 0 -400 0 -340 0 +P 2 1 0 0 -400 -100 -340 -100 +P 2 1 0 0 -400 -200 -340 -200 +P 2 1 0 0 -400 300 -340 300 +P 2 1 0 0 500 0 430 0 +P 2 1 0 0 220 0 190 0 +P 2 1 0 0 -40 340 -40 240 +P 2 1 0 0 -40 40 -40 -260 +P 2 1 0 0 -100 240 -40 240 +P 2 1 0 0 -150 300 -100 300 +P 2 1 0 0 -100 40 -40 40 +T 1 115 -15 70 0 1 0 Array +T 0 365 335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-FC65P +# Package Name: DIL8 +# Dev Tech: FC65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-FC65P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-FC65P" -400 -400 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 -100 350 +P 2 1 0 0 -190 0 -100 0 +P 2 1 0 0 -190 -100 -100 -100 +P 2 1 0 0 -190 -200 -100 -200 +P 2 1 0 0 -400 0 -340 0 +P 2 1 0 0 -400 -100 -340 -100 +P 2 1 0 0 -400 -200 -340 -200 +P 2 1 0 0 -400 300 -340 300 +P 2 1 0 0 500 0 430 0 +P 2 1 0 0 220 0 190 0 +P 2 1 0 0 -40 340 -40 240 +P 2 1 0 0 -40 40 -40 -260 +P 2 1 0 0 -100 240 -40 240 +P 2 1 0 0 -150 300 -100 300 +P 2 1 0 0 -100 40 -40 40 +T 1 115 -15 70 0 1 0 Array +T 0 365 335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24-FC65SM +# Package Name: SO-08M +# Dev Tech: FC65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24-FC65SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24AA32 +F0 "IC" -400 450 50 H V L B +F1 "24-FC65SM" -400 -400 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 500 400 +P 2 1 0 0 500 400 500 0 +P 2 1 0 0 500 0 500 -300 +P 2 1 0 0 500 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 -200 +P 2 1 0 0 -400 -200 -400 -100 +P 2 1 0 0 -400 -100 -400 0 +P 2 1 0 0 -400 0 -400 300 +P 2 1 0 0 -400 300 -400 400 +P 2 1 0 0 -100 350 190 350 +P 2 1 0 0 190 350 190 0 +P 2 1 0 0 190 0 190 -260 +P 2 1 0 0 190 -260 -40 -260 +P 2 1 0 0 -40 -260 -100 -260 +P 2 1 0 0 -100 -260 -100 -200 +P 2 1 0 0 -100 -200 -100 -100 +P 2 1 0 0 -100 -100 -100 0 +P 2 1 0 0 -100 0 -100 40 +P 2 1 0 0 -100 40 -100 240 +P 2 1 0 0 -100 240 -100 300 +P 2 1 0 0 -100 300 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335 70 0 1 0 VCC +T 0 375 -235 70 0 1 0 GND +T 1 25 20 70 0 1 0 EEPROM +X A0 1 -500 -200 100 R 40 40 1 1 I +X A1 2 -500 -100 100 R 40 40 1 1 I +X A2 3 -500 0 100 R 40 40 1 1 I +X GND 4 300 -400 100 U 40 40 1 1 W +X SCL 6 -500 300 100 R 40 40 1 1 I +X SDA 5 600 0 100 L 40 40 1 1 B +X VCC 8 300 500 100 D 40 40 1 1 W +X WP 7 -500 200 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 24LCS61N +# Package Name: DIL8 +# Dev Tech: 1 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24LCS61N IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24LC61 +F0 "IC" -500 450 50 H V L B +F1 "24LCS61N" -500 -200 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -500 400 600 400 +P 2 1 0 0 600 400 600 100 +P 2 1 0 0 600 100 600 -100 +P 2 1 0 0 600 -100 -500 -100 +P 2 1 0 0 -500 -100 -500 0 +P 2 1 0 0 -500 0 -500 100 +P 2 1 0 0 -500 100 -500 400 +P 2 1 0 0 -270 350 200 350 +P 2 1 0 0 200 350 200 100 +P 2 1 0 0 200 100 200 -60 +P 2 1 0 0 200 -60 -40 -60 +P 2 1 0 0 -40 -60 -100 -60 +P 2 1 0 0 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70 0 1 0 EEPROM +X EDS\ 3 700 100 100 L 40 40 1 1 O +X GND 4 400 -200 100 U 40 40 1 1 W +X SCL 6 -600 0 100 R 40 40 1 1 I +X SDA 5 -600 100 100 R 40 40 1 1 B +X VCC 8 400 500 100 D 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: 24LCS62ST +# Package Name: TSSOP8 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF 24LCS62ST IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 24LC61 +F0 "IC" -500 450 50 H V L B +F1 "24LCS62ST" -500 -200 50 H V L B +F2 "microchip-5-TSSOP8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -500 400 600 400 +P 2 1 0 0 600 400 600 100 +P 2 1 0 0 600 100 600 -100 +P 2 1 0 0 600 -100 -500 -100 +P 2 1 0 0 -500 -100 -500 0 +P 2 1 0 0 -500 0 -500 100 +P 2 1 0 0 -500 100 -500 400 +P 2 1 0 0 -270 350 200 350 +P 2 1 0 0 200 350 200 100 +P 2 1 0 0 200 100 200 -60 +P 2 1 0 0 200 -60 -40 -60 +P 2 1 0 0 -40 -60 -100 -60 +P 2 1 0 0 -100 -60 -100 0 +P 2 1 0 0 -100 0 -100 100 +P 2 1 0 0 -100 100 -100 140 +P 2 1 0 0 -100 140 -100 200 +P 2 1 0 0 -100 200 -270 200 +P 2 1 0 0 -270 200 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Gate Name: G$1 +# Symbol Name: 27C256 +F0 "IC" -300 1250 50 H V L B +F1 "27LV256L" -300 -1300 50 H V L B +F2 "microchip-5-PLCC-32" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1200 400 1200 +P 2 1 0 0 400 1200 400 -1200 +P 2 1 0 0 400 -1200 -300 -1200 +P 2 1 0 0 -300 -1200 -300 1200 +X A0 11 -400 500 100 R 40 40 1 1 I +X A1 10 -400 400 100 R 40 40 1 1 I +X A2 9 -400 300 100 R 40 40 1 1 I +X A3 8 -400 200 100 R 40 40 1 1 I +X A4 7 -400 100 100 R 40 40 1 1 I +X A5 6 -400 0 100 R 40 40 1 1 I +X A6 5 -400 -100 100 R 40 40 1 1 I +X A7 4 -400 -200 100 R 40 40 1 1 I +X A8 29 -400 -300 100 R 40 40 1 1 I +X A9 28 -400 -400 100 R 40 40 1 1 I +X A10 24 -400 -500 100 R 40 40 1 1 I +X A11 27 -400 -600 100 R 40 40 1 1 I +X A12 3 -400 -700 100 R 40 40 1 1 I +X A13 30 -400 -800 100 R 40 40 1 1 I +X A14 31 -400 -900 100 R 40 40 1 1 I +X CE\ 23 -400 700 100 R 40 40 1 1 I +X D0 13 500 500 100 L 40 40 1 1 T +X D1 14 500 400 100 L 40 40 1 1 T +X D2 15 500 300 100 L 40 40 1 1 T +X D3 18 500 200 100 L 40 40 1 1 T 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40 1 1 I +X A8 25 -400 -300 100 R 40 40 1 1 I +X A9 24 -400 -400 100 R 40 40 1 1 I +X A10 21 -400 -500 100 R 40 40 1 1 I +X A11 23 -400 -600 100 R 40 40 1 1 I +X A12 2 -400 -700 100 R 40 40 1 1 I +X A13 26 -400 -800 100 R 40 40 1 1 I +X A14 27 -400 -900 100 R 40 40 1 1 I +X CE\ 20 -400 700 100 R 40 40 1 1 I +X D0 11 500 500 100 L 40 40 1 1 T +X D1 12 500 400 100 L 40 40 1 1 T +X D2 13 500 300 100 L 40 40 1 1 T +X D3 15 500 200 100 L 40 40 1 1 T +X D4 16 500 100 100 L 40 40 1 1 T +X D5 17 500 0 100 L 40 40 1 1 T +X D6 18 500 -100 100 L 40 40 1 1 T +X D7 19 500 -200 100 L 40 40 1 1 T +X GND 14 -400 -1100 100 R 40 40 1 1 W +X OE\ 22 -400 800 100 R 40 40 1 1 I +X VCC 28 -400 1100 100 R 40 40 1 1 W +X VPP 1 -400 1000 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 27LV256SO +# Package Name: SO-28W +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 27LV256SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 27C256 +F0 "IC" -300 1250 50 H V L B +F1 "27LV256SO" -300 -1300 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1200 400 1200 +P 2 1 0 0 400 1200 400 -1200 +P 2 1 0 0 400 -1200 -300 -1200 +P 2 1 0 0 -300 -1200 -300 1200 +X A0 10 -400 500 100 R 40 40 1 1 I +X A1 9 -400 400 100 R 40 40 1 1 I +X A2 8 -400 300 100 R 40 40 1 1 I +X A3 7 -400 200 100 R 40 40 1 1 I +X A4 6 -400 100 100 R 40 40 1 1 I +X A5 5 -400 0 100 R 40 40 1 1 I +X A6 4 -400 -100 100 R 40 40 1 1 I +X A7 3 -400 -200 100 R 40 40 1 1 I +X A8 25 -400 -300 100 R 40 40 1 1 I +X A9 24 -400 -400 100 R 40 40 1 1 I +X A10 21 -400 -500 100 R 40 40 1 1 I +X A11 23 -400 -600 100 R 40 40 1 1 I +X A12 2 -400 -700 100 R 40 40 1 1 I +X A13 26 -400 -800 100 R 40 40 1 1 I +X A14 27 -400 -900 100 R 40 40 1 1 I +X CE\ 20 -400 700 100 R 40 40 1 1 I +X D0 11 500 500 100 L 40 40 1 1 T +X D1 12 500 400 100 L 40 40 1 1 T +X D2 13 500 300 100 L 40 40 1 1 T +X D3 15 500 200 100 L 40 40 1 1 T +X D4 16 500 100 100 L 40 40 1 1 T +X D5 17 500 0 100 L 40 40 1 1 T +X D6 18 500 -100 100 L 40 40 1 1 T +X D7 19 500 -200 100 L 40 40 1 1 T +X GND 14 -400 -1100 100 R 40 40 1 1 W +X OE\ 22 -400 800 100 R 40 40 1 1 I +X VCC 28 -400 1100 100 R 40 40 1 1 W +X VPP 1 -400 1000 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 27LV512ATS +# Package Name: TSOP28 +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 27LV512ATS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 27C512 +F0 "IC" -300 1250 50 H V L B +F1 "27LV512ATS" -300 -1300 50 H V L B +F2 "microchip-5-TSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1200 400 1200 +P 2 1 0 0 400 1200 400 -1200 +P 2 1 0 0 400 -1200 -300 -1200 +P 2 1 0 0 -300 -1200 -300 1200 +X A0 17 -400 600 100 R 40 40 1 1 I +X A1 16 -400 500 100 R 40 40 1 1 I +X A2 15 -400 400 100 R 40 40 1 1 I +X A3 14 -400 300 100 R 40 40 1 1 I +X A4 13 -400 200 100 R 40 40 1 1 I +X A5 12 -400 100 100 R 40 40 1 1 I +X A6 11 -400 0 100 R 40 40 1 1 I +X A7 10 -400 -100 100 R 40 40 1 1 I +X A8 4 -400 -200 100 R 40 40 1 1 I +X A9 3 -400 -300 100 R 40 40 1 1 I +X A10 28 -400 -400 100 R 40 40 1 1 I +X A11 2 -400 -500 100 R 40 40 1 1 I +X A12 9 -400 -600 100 R 40 40 1 1 I +X A13 5 -400 -700 100 R 40 40 1 1 I +X A14 6 -400 -800 100 R 40 40 1 1 I +X A15 8 -400 -900 100 R 40 40 1 1 I +X CE\ 27 -400 800 100 R 40 40 1 1 I +X D0 18 500 600 100 L 40 40 1 1 T +X D1 19 500 500 100 L 40 40 1 1 T +X D2 20 500 400 100 L 40 40 1 1 T +X D3 22 500 300 100 L 40 40 1 1 T +X D4 23 500 200 100 L 40 40 1 1 T +X D5 24 500 100 100 L 40 40 1 1 T +X D6 25 500 0 100 L 40 40 1 1 T +X D7 26 500 -100 100 L 40 40 1 1 T +X GND 21 -400 -1100 100 R 40 40 1 1 W +X VCC 7 -400 1100 100 R 40 40 1 1 W +X VPP/OE\ 1 -400 900 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C04AL +# Package Name: PLCC-32 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C04AL IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C04 +F0 "IC" -400 850 50 H V L B +F1 "28C04AL" -400 -1100 50 H V L B +F2 "microchip-5-PLCC-32" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 300 800 +P 2 1 0 0 300 800 300 -1000 +P 2 1 0 0 300 -1000 -400 -1000 +P 2 1 0 0 -400 -1000 -400 800 +X A0 11 -500 100 100 R 40 40 1 1 I +X A1 10 -500 0 100 R 40 40 1 1 I +X A2 9 -500 -100 100 R 40 40 1 1 I +X A3 8 -500 -200 100 R 40 40 1 1 I +X A4 7 -500 -300 100 R 40 40 1 1 I +X A5 6 -500 -400 100 R 40 40 1 1 I +X A6 5 -500 -500 100 R 40 40 1 1 I +X A7 4 -500 -600 100 R 40 40 1 1 I +X A8 29 -500 -700 100 R 40 40 1 1 I +X CE\ 23 -500 300 100 R 40 40 1 1 I +X D0 13 400 100 100 L 40 40 1 1 T +X D1 14 400 0 100 L 40 40 1 1 T +X D2 15 400 -100 100 L 40 40 1 1 T +X D3 18 400 -200 100 L 40 40 1 1 T +X D4 19 400 -300 100 L 40 40 1 1 T +X D5 20 400 -400 100 L 40 40 1 1 T +X D6 21 400 -500 100 L 40 40 1 1 T +X D7 22 400 -600 100 L 40 40 1 1 T +X GND 16 -500 -900 100 R 40 40 1 1 W +X NC19 1 0 500 0 R 40 40 1 1 U +X NC22 17 0 400 0 R 40 40 1 1 U +X OE\ 25 -500 400 100 R 40 40 1 1 I +X VCC 32 -500 700 100 R 40 40 1 1 W +X WE\ 31 -500 500 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C04AP +# Package Name: DIL24-6 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C04AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C04 +F0 "IC" -400 850 50 H V L B +F1 "28C04AP" -400 -1100 50 H V L B +F2 "microchip-5-DIL24-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 300 800 +P 2 1 0 0 300 800 300 -1000 +P 2 1 0 0 300 -1000 -400 -1000 +P 2 1 0 0 -400 -1000 -400 800 +X A0 8 -500 100 100 R 40 40 1 1 I +X A1 7 -500 0 100 R 40 40 1 1 I +X A2 6 -500 -100 100 R 40 40 1 1 I +X A3 5 -500 -200 100 R 40 40 1 1 I +X A4 4 -500 -300 100 R 40 40 1 1 I +X A5 3 -500 -400 100 R 40 40 1 1 I +X A6 2 -500 -500 100 R 40 40 1 1 I +X A7 1 -500 -600 100 R 40 40 1 1 I +X A8 23 -500 -700 100 R 40 40 1 1 I +X CE\ 18 -500 300 100 R 40 40 1 1 I +X D0 9 400 100 100 L 40 40 1 1 T +X D1 10 400 0 100 L 40 40 1 1 T +X D2 11 400 -100 100 L 40 40 1 1 T +X D3 13 400 -200 100 L 40 40 1 1 T +X D4 14 400 -300 100 L 40 40 1 1 T +X D5 15 400 -400 100 L 40 40 1 1 T +X D6 16 400 -500 100 L 40 40 1 1 T +X D7 17 400 -600 100 L 40 40 1 1 T +X GND 12 -500 -900 100 R 40 40 1 1 W +X NC19 19 0 500 0 R 40 40 1 1 U +X NC22 22 0 400 0 R 40 40 1 1 U +X OE\ 20 -500 400 100 R 40 40 1 1 I +X VCC 24 -500 700 100 R 40 40 1 1 W +X WE\ 21 -500 500 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C16AL +# Package Name: PLCC-32 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C16AL IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C16 +F0 "IC" -300 1050 50 H V L B +F1 "28C16AL" -300 -1100 50 H V L B +F2 "microchip-5-PLCC-32" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1000 300 1000 +P 2 1 0 0 300 1000 300 -1000 +P 2 1 0 0 300 -1000 -300 -1000 +P 2 1 0 0 -300 -1000 -300 1000 +X A0 11 -400 300 100 R 40 40 1 1 I +X A1 10 -400 200 100 R 40 40 1 1 I +X A2 9 -400 100 100 R 40 40 1 1 I +X A3 8 -400 0 100 R 40 40 1 1 I +X A4 7 -400 -100 100 R 40 40 1 1 I +X A5 6 -400 -200 100 R 40 40 1 1 I +X A6 5 -400 -300 100 R 40 40 1 1 I +X A7 4 -400 -400 100 R 40 40 1 1 I +X A8 29 -400 -500 100 R 40 40 1 1 I +X A9 28 -400 -600 100 R 40 40 1 1 I +X A10 24 -400 -700 100 R 40 40 1 1 I +X CE\ 23 -400 500 100 R 40 40 1 1 I +X D0 13 400 300 100 L 40 40 1 1 T +X D1 14 400 200 100 L 40 40 1 1 T +X D2 15 400 100 100 L 40 40 1 1 T +X D3 18 400 0 100 L 40 40 1 1 T +X D4 19 400 -100 100 L 40 40 1 1 T +X D5 20 400 -200 100 L 40 40 1 1 T +X D6 21 400 -300 100 L 40 40 1 1 T +X D7 22 400 -400 100 L 40 40 1 1 T +X GND 16 -400 -900 100 R 40 40 1 1 W +X OE\ 25 -400 600 100 R 40 40 1 1 I +X VCC 32 -400 900 100 R 40 40 1 1 W +X WE\ 31 -400 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C16AP +# Package Name: DIL24-6 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C16AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C16 +F0 "IC" -300 1050 50 H V L B +F1 "28C16AP" -300 -1100 50 H V L B +F2 "microchip-5-DIL24-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1000 300 1000 +P 2 1 0 0 300 1000 300 -1000 +P 2 1 0 0 300 -1000 -300 -1000 +P 2 1 0 0 -300 -1000 -300 1000 +X A0 8 -400 300 100 R 40 40 1 1 I +X A1 7 -400 200 100 R 40 40 1 1 I +X A2 6 -400 100 100 R 40 40 1 1 I +X A3 5 -400 0 100 R 40 40 1 1 I +X A4 4 -400 -100 100 R 40 40 1 1 I +X A5 3 -400 -200 100 R 40 40 1 1 I +X A6 2 -400 -300 100 R 40 40 1 1 I +X A7 1 -400 -400 100 R 40 40 1 1 I +X A8 23 -400 -500 100 R 40 40 1 1 I +X A9 22 -400 -600 100 R 40 40 1 1 I +X A10 19 -400 -700 100 R 40 40 1 1 I +X CE\ 18 -400 500 100 R 40 40 1 1 I +X D0 9 400 300 100 L 40 40 1 1 T +X D1 10 400 200 100 L 40 40 1 1 T +X D2 11 400 100 100 L 40 40 1 1 T +X D3 13 400 0 100 L 40 40 1 1 T +X D4 14 400 -100 100 L 40 40 1 1 T +X D5 15 400 -200 100 L 40 40 1 1 T +X D6 16 400 -300 100 L 40 40 1 1 T +X D7 17 400 -400 100 L 40 40 1 1 T +X GND 12 -400 -900 100 R 40 40 1 1 W +X OE\ 20 -400 600 100 R 40 40 1 1 I +X VCC 24 -400 900 100 R 40 40 1 1 W +X WE\ 21 -400 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C16ATS +# Package Name: TSOP28 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C16ATS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C16 +F0 "IC" -300 1050 50 H V L B +F1 "28C16ATS" -300 -1100 50 H V L B +F2 "microchip-5-TSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1000 300 1000 +P 2 1 0 0 300 1000 300 -1000 +P 2 1 0 0 300 -1000 -300 -1000 +P 2 1 0 0 -300 -1000 -300 1000 +X A0 17 -400 300 100 R 40 40 1 1 I +X A1 16 -400 200 100 R 40 40 1 1 I +X A2 15 -400 100 100 R 40 40 1 1 I +X A3 14 -400 0 100 R 40 40 1 1 I +X A4 13 -400 -100 100 R 40 40 1 1 I +X A5 12 -400 -200 100 R 40 40 1 1 I +X A6 11 -400 -300 100 R 40 40 1 1 I +X A7 10 -400 -400 100 R 40 40 1 1 I +X A8 4 -400 -500 100 R 40 40 1 1 I +X A9 3 -400 -600 100 R 40 40 1 1 I +X A10 28 -400 -700 100 R 40 40 1 1 I +X CE\ 27 -400 500 100 R 40 40 1 1 I +X D0 18 400 300 100 L 40 40 1 1 T +X D1 19 400 200 100 L 40 40 1 1 T +X D2 20 400 100 100 L 40 40 1 1 T +X D3 22 400 0 100 L 40 40 1 1 T +X D4 23 400 -100 100 L 40 40 1 1 T +X D5 24 400 -200 100 L 40 40 1 1 T +X D6 25 400 -300 100 L 40 40 1 1 T +X D7 26 400 -400 100 L 40 40 1 1 T +X GND 21 -400 -900 100 R 40 40 1 1 W +X OE\ 1 -400 600 100 R 40 40 1 1 I +X VCC 7 -400 900 100 R 40 40 1 1 W +X WE\ 6 -400 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C16AVS +# Package Name: VSOP28-8X13 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C16AVS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C16 +F0 "IC" -300 1050 50 H V L B +F1 "28C16AVS" -300 -1100 50 H V L B +F2 "microchip-5-VSOP28-8X13" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 1000 300 1000 +P 2 1 0 0 300 1000 300 -1000 +P 2 1 0 0 300 -1000 -300 -1000 +P 2 1 0 0 -300 -1000 -300 1000 +X A0 10 -400 300 100 R 40 40 1 1 I +X A1 9 -400 200 100 R 40 40 1 1 I +X A2 8 -400 100 100 R 40 40 1 1 I +X A3 7 -400 0 100 R 40 40 1 1 I +X A4 6 -400 -100 100 R 40 40 1 1 I +X A5 5 -400 -200 100 R 40 40 1 1 I +X A6 4 -400 -300 100 R 40 40 1 1 I +X A7 3 -400 -400 100 R 40 40 1 1 I +X A8 25 -400 -500 100 R 40 40 1 1 I +X A9 24 -400 -600 100 R 40 40 1 1 I +X A10 21 -400 -700 100 R 40 40 1 1 I +X CE\ 20 -400 500 100 R 40 40 1 1 I +X D0 11 400 300 100 L 40 40 1 1 T +X D1 12 400 200 100 L 40 40 1 1 T +X D2 13 400 100 100 L 40 40 1 1 T +X D3 15 400 0 100 L 40 40 1 1 T +X D4 16 400 -100 100 L 40 40 1 1 T +X D5 17 400 -200 100 L 40 40 1 1 T +X D6 18 400 -300 100 L 40 40 1 1 T +X D7 19 400 -400 100 L 40 40 1 1 T +X GND 14 -400 -900 100 R 40 40 1 1 W +X OE\ 22 -400 600 100 R 40 40 1 1 I +X VCC 28 -400 900 100 R 40 40 1 1 W +X WE\ 27 -400 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C17AL +# Package Name: PLCC-32 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 4 +# +DEF 28C17AL IC 0 40 Y Y 4 L N +# Gate Name: 2 +# Symbol Name: NC +F0 "IC" 0 0 50 H V C C +F1 "28C17AL" 0 0 50 H V C C +F2 "microchip-5-PLCC-32" 0 150 50 H I C C +DRAW +X NC 1 -100 0 0 R 40 40 1 1 U +# Gate Name: 23 +# Symbol Name: NC +X NC 3 -100 0 0 R 40 40 2 1 U +# Gate Name: 26 +# Symbol Name: NC +X NC 12 -100 0 0 R 40 40 3 1 U +# Gate Name: G$1 +# Symbol Name: 28C17 +P 2 4 0 0 -400 1000 400 1000 +P 2 4 0 0 400 1000 400 -1000 +P 2 4 0 0 400 -1000 -400 -1000 +P 2 4 0 0 -400 -1000 -400 1000 +X A0 11 -500 300 100 R 40 40 4 1 I +X A1 10 -500 200 100 R 40 40 4 1 I +X A2 9 -500 100 100 R 40 40 4 1 I +X A3 8 -500 0 100 R 40 40 4 1 I +X A4 7 -500 -100 100 R 40 40 4 1 I +X A5 6 -500 -200 100 R 40 40 4 1 I +X A6 5 -500 -300 100 R 40 40 4 1 I +X A7 4 -500 -400 100 R 40 40 4 1 I +X A8 29 -500 -500 100 R 40 40 4 1 I +X A9 28 -500 -600 100 R 40 40 4 1 I +X A10 24 -500 -700 100 R 40 40 4 1 I +X CE\ 23 -500 500 100 R 40 40 4 1 I +X D0 13 500 300 100 L 40 40 4 1 T +X D1 14 500 200 100 L 40 40 4 1 T +X D2 15 500 100 100 L 40 40 4 1 T +X D3 18 500 0 100 L 40 40 4 1 T +X D4 19 500 -100 100 L 40 40 4 1 T +X D5 20 500 -200 100 L 40 40 4 1 T +X D6 21 500 -300 100 L 40 40 4 1 T +X D7 22 500 -400 100 L 40 40 4 1 T +X GND 16 -500 -900 100 R 40 40 4 1 W +X OE\ 25 -500 600 100 R 40 40 4 1 I +X RDY/BSY\ 2 500 500 100 L 40 40 4 1 O +X VCC 32 -500 900 100 R 40 40 4 1 W +X WE\ 31 -500 700 100 R 40 40 4 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C17AP +# Package Name: DIL28-6 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 4 +# +DEF 28C17AP IC 0 40 Y Y 4 L N +# Gate Name: 2 +# Symbol Name: NC +F0 "IC" 0 0 50 H V C C +F1 "28C17AP" 0 0 50 H V C C +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +X NC 2 -100 0 0 R 40 40 1 1 U +# Gate Name: 23 +# Symbol Name: NC +X NC 23 -100 0 0 R 40 40 2 1 U +# Gate Name: 26 +# Symbol Name: NC +X NC 26 -100 0 0 R 40 40 3 1 U +# Gate Name: G$1 +# Symbol Name: 28C17 +P 2 4 0 0 -400 1000 400 1000 +P 2 4 0 0 400 1000 400 -1000 +P 2 4 0 0 400 -1000 -400 -1000 +P 2 4 0 0 -400 -1000 -400 1000 +X A0 10 -500 300 100 R 40 40 4 1 I +X A1 9 -500 200 100 R 40 40 4 1 I +X A2 8 -500 100 100 R 40 40 4 1 I +X A3 7 -500 0 100 R 40 40 4 1 I +X A4 6 -500 -100 100 R 40 40 4 1 I +X A5 5 -500 -200 100 R 40 40 4 1 I +X A6 4 -500 -300 100 R 40 40 4 1 I +X A7 3 -500 -400 100 R 40 40 4 1 I +X A8 25 -500 -500 100 R 40 40 4 1 I +X A9 24 -500 -600 100 R 40 40 4 1 I +X A10 21 -500 -700 100 R 40 40 4 1 I +X CE\ 20 -500 500 100 R 40 40 4 1 I +X D0 11 500 300 100 L 40 40 4 1 T +X D1 12 500 200 100 L 40 40 4 1 T +X D2 13 500 100 100 L 40 40 4 1 T +X D3 15 500 0 100 L 40 40 4 1 T +X D4 16 500 -100 100 L 40 40 4 1 T +X D5 17 500 -200 100 L 40 40 4 1 T +X D6 18 500 -300 100 L 40 40 4 1 T +X D7 19 500 -400 100 L 40 40 4 1 T +X GND 14 -500 -900 100 R 40 40 4 1 W +X OE\ 22 -500 600 100 R 40 40 4 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 4 1 O +X VCC 28 -500 900 100 R 40 40 4 1 W +X WE\ 27 -500 700 100 R 40 40 4 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C17ASO +# Package Name: SO-28W +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 4 +# +DEF 28C17ASO IC 0 40 Y Y 4 L N +# Gate Name: 2 +# Symbol Name: NC +F0 "IC" 0 0 50 H V C C +F1 "28C17ASO" 0 0 50 H V C C +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +X NC 2 -100 0 0 R 40 40 1 1 U +# Gate Name: 23 +# Symbol Name: NC +X NC 23 -100 0 0 R 40 40 2 1 U +# Gate Name: 26 +# Symbol Name: NC +X NC 26 -100 0 0 R 40 40 3 1 U +# Gate Name: G$1 +# Symbol Name: 28C17 +P 2 4 0 0 -400 1000 400 1000 +P 2 4 0 0 400 1000 400 -1000 +P 2 4 0 0 400 -1000 -400 -1000 +P 2 4 0 0 -400 -1000 -400 1000 +X A0 10 -500 300 100 R 40 40 4 1 I +X A1 9 -500 200 100 R 40 40 4 1 I +X A2 8 -500 100 100 R 40 40 4 1 I +X A3 7 -500 0 100 R 40 40 4 1 I +X A4 6 -500 -100 100 R 40 40 4 1 I +X A5 5 -500 -200 100 R 40 40 4 1 I +X A6 4 -500 -300 100 R 40 40 4 1 I +X A7 3 -500 -400 100 R 40 40 4 1 I +X A8 25 -500 -500 100 R 40 40 4 1 I +X A9 24 -500 -600 100 R 40 40 4 1 I +X A10 21 -500 -700 100 R 40 40 4 1 I +X CE\ 20 -500 500 100 R 40 40 4 1 I +X D0 11 500 300 100 L 40 40 4 1 T +X D1 12 500 200 100 L 40 40 4 1 T +X D2 13 500 100 100 L 40 40 4 1 T +X D3 15 500 0 100 L 40 40 4 1 T +X D4 16 500 -100 100 L 40 40 4 1 T +X D5 17 500 -200 100 L 40 40 4 1 T +X D6 18 500 -300 100 L 40 40 4 1 T +X D7 19 500 -400 100 L 40 40 4 1 T +X GND 14 -500 -900 100 R 40 40 4 1 W +X OE\ 22 -500 600 100 R 40 40 4 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 4 1 O +X VCC 28 -500 900 100 R 40 40 4 1 W +X WE\ 27 -500 700 100 R 40 40 4 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C17ATS +# Package Name: TSOP28 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 4 +# +DEF 28C17ATS IC 0 40 Y Y 4 L N +# Gate Name: 2 +# Symbol Name: NC +F0 "IC" 0 0 50 H V C C +F1 "28C17ATS" 0 0 50 H V C C +F2 "microchip-5-TSOP28" 0 150 50 H I C C +DRAW +X NC 2 -100 0 0 R 40 40 1 1 U +# Gate Name: 23 +# Symbol Name: NC +X NC 5 -100 0 0 R 40 40 2 1 U +# Gate Name: 26 +# Symbol Name: NC +X NC 9 -100 0 0 R 40 40 3 1 U +# Gate Name: G$1 +# Symbol Name: 28C17 +P 2 4 0 0 -400 1000 400 1000 +P 2 4 0 0 400 1000 400 -1000 +P 2 4 0 0 400 -1000 -400 -1000 +P 2 4 0 0 -400 -1000 -400 1000 +X A0 17 -500 300 100 R 40 40 4 1 I +X A1 16 -500 200 100 R 40 40 4 1 I +X A2 15 -500 100 100 R 40 40 4 1 I +X A3 14 -500 0 100 R 40 40 4 1 I +X A4 13 -500 -100 100 R 40 40 4 1 I +X A5 12 -500 -200 100 R 40 40 4 1 I +X A6 11 -500 -300 100 R 40 40 4 1 I +X A7 10 -500 -400 100 R 40 40 4 1 I +X A8 4 -500 -500 100 R 40 40 4 1 I +X A9 3 -500 -600 100 R 40 40 4 1 I +X A10 28 -500 -700 100 R 40 40 4 1 I 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Name: 28C17 +P 2 4 0 0 -400 1000 400 1000 +P 2 4 0 0 400 1000 400 -1000 +P 2 4 0 0 400 -1000 -400 -1000 +P 2 4 0 0 -400 -1000 -400 1000 +X A0 10 -500 300 100 R 40 40 4 1 I +X A1 9 -500 200 100 R 40 40 4 1 I +X A2 8 -500 100 100 R 40 40 4 1 I +X A3 7 -500 0 100 R 40 40 4 1 I +X A4 6 -500 -100 100 R 40 40 4 1 I +X A5 5 -500 -200 100 R 40 40 4 1 I +X A6 4 -500 -300 100 R 40 40 4 1 I +X A7 3 -500 -400 100 R 40 40 4 1 I +X A8 25 -500 -500 100 R 40 40 4 1 I +X A9 24 -500 -600 100 R 40 40 4 1 I +X A10 21 -500 -700 100 R 40 40 4 1 I +X CE\ 20 -500 500 100 R 40 40 4 1 I +X D0 11 500 300 100 L 40 40 4 1 T +X D1 12 500 200 100 L 40 40 4 1 T +X D2 13 500 100 100 L 40 40 4 1 T +X D3 15 500 0 100 L 40 40 4 1 T +X D4 16 500 -100 100 L 40 40 4 1 T +X D5 17 500 -200 100 L 40 40 4 1 T +X D6 18 500 -300 100 L 40 40 4 1 T +X D7 19 500 -400 100 L 40 40 4 1 T +X GND 14 -500 -900 100 R 40 40 4 1 W +X OE\ 22 -500 600 100 R 40 40 4 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 4 1 O +X VCC 28 -500 900 100 R 40 40 4 1 W +X WE\ 27 -500 700 100 R 40 40 4 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C64AL +# Package Name: PLCC-32 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C64AL IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28C64AL" -400 -1300 50 H V L B +F2 "microchip-5-PLCC-32" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 11 -500 -900 100 R 40 40 1 1 I +X A1 10 -500 -800 100 R 40 40 1 1 I +X A2 9 -500 -700 100 R 40 40 1 1 I +X A3 8 -500 -600 100 R 40 40 1 1 I +X A4 7 -500 -500 100 R 40 40 1 1 I +X A5 6 -500 -400 100 R 40 40 1 1 I +X A6 5 -500 -300 100 R 40 40 1 1 I +X A7 4 -500 -200 100 R 40 40 1 1 I +X A8 29 -500 -100 100 R 40 40 1 1 I +X A9 28 -500 0 100 R 40 40 1 1 I +X A10 24 -500 100 100 R 40 40 1 1 I +X A11 27 -500 200 100 R 40 40 1 1 I +X A12 3 -500 300 100 R 40 40 1 1 I +X CE\ 23 -500 500 100 R 40 40 1 1 I +X D0 13 500 -400 100 L 40 40 1 1 T +X D1 14 500 -300 100 L 40 40 1 1 T +X D2 15 500 -200 100 L 40 40 1 1 T +X D3 18 500 -100 100 L 40 40 1 1 T +X D4 19 500 0 100 L 40 40 1 1 T +X D5 20 500 100 100 L 40 40 1 1 T +X D6 21 500 200 100 L 40 40 1 1 T +X D7 22 500 300 100 L 40 40 1 1 T +X GND 16 -500 -1100 100 R 40 40 1 1 W +X OE\ 25 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 2 500 500 100 L 40 40 1 1 O +X VCC 32 -500 900 100 R 40 40 1 1 W +X WE\ 31 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C64AP +# Package Name: DIL28-6 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C64AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28C64AP" -400 -1300 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C64ASO +# Package Name: SO-28W +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C64ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28C64ASO" -400 -1300 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C64ATS +# Package Name: TSOP28 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C64ATS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28C64ATS" -400 -1300 50 H V L B +F2 "microchip-5-TSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 17 -500 -900 100 R 40 40 1 1 I +X A1 16 -500 -800 100 R 40 40 1 1 I +X A2 15 -500 -700 100 R 40 40 1 1 I +X A3 14 -500 -600 100 R 40 40 1 1 I +X A4 13 -500 -500 100 R 40 40 1 1 I +X A5 12 -500 -400 100 R 40 40 1 1 I +X A6 11 -500 -300 100 R 40 40 1 1 I +X A7 10 -500 -200 100 R 40 40 1 1 I +X A8 4 -500 -100 100 R 40 40 1 1 I +X A9 3 -500 0 100 R 40 40 1 1 I +X A10 28 -500 100 100 R 40 40 1 1 I +X A11 2 -500 200 100 R 40 40 1 1 I +X A12 9 -500 300 100 R 40 40 1 1 I +X CE\ 27 -500 500 100 R 40 40 1 1 I +X D0 18 500 -400 100 L 40 40 1 1 T +X D1 19 500 -300 100 L 40 40 1 1 T +X D2 20 500 -200 100 L 40 40 1 1 T +X D3 22 500 -100 100 L 40 40 1 1 T +X D4 23 500 0 100 L 40 40 1 1 T +X D5 24 500 100 100 L 40 40 1 1 T +X D6 25 500 200 100 L 40 40 1 1 T +X D7 26 500 300 100 L 40 40 1 1 T +X GND 21 -500 -1100 100 R 40 40 1 1 W +X OE\ 1 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 8 500 500 100 L 40 40 1 1 O +X VCC 7 -500 900 100 R 40 40 1 1 W +X WE\ 6 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28C64AVS +# Package Name: VSOP28-8X13 +# Dev Tech: C +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28C64AVS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28C64AVS" -400 -1300 50 H V L B +F2 "microchip-5-VSOP28-8X13" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28LV64AP +# Package Name: DIL28-6 +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28LV64AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28LV64AP" -400 -1300 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28LV64ASO +# Package Name: SO-28W +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28LV64ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28LV64ASO" -400 -1300 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28LV64ATS +# Package Name: TSOP28 +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28LV64ATS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28LV64ATS" -400 -1300 50 H V L B +F2 "microchip-5-TSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 17 -500 -900 100 R 40 40 1 1 I +X A1 16 -500 -800 100 R 40 40 1 1 I +X A2 15 -500 -700 100 R 40 40 1 1 I +X A3 14 -500 -600 100 R 40 40 1 1 I +X A4 13 -500 -500 100 R 40 40 1 1 I +X A5 12 -500 -400 100 R 40 40 1 1 I +X A6 11 -500 -300 100 R 40 40 1 1 I +X A7 10 -500 -200 100 R 40 40 1 1 I +X A8 4 -500 -100 100 R 40 40 1 1 I +X A9 3 -500 0 100 R 40 40 1 1 I +X A10 28 -500 100 100 R 40 40 1 1 I +X A11 2 -500 200 100 R 40 40 1 1 I +X A12 9 -500 300 100 R 40 40 1 1 I +X CE\ 27 -500 500 100 R 40 40 1 1 I +X D0 18 500 -400 100 L 40 40 1 1 T +X D1 19 500 -300 100 L 40 40 1 1 T +X D2 20 500 -200 100 L 40 40 1 1 T +X D3 22 500 -100 100 L 40 40 1 1 T +X D4 23 500 0 100 L 40 40 1 1 T +X D5 24 500 100 100 L 40 40 1 1 T +X D6 25 500 200 100 L 40 40 1 1 T +X D7 26 500 300 100 L 40 40 1 1 T +X GND 21 -500 -1100 100 R 40 40 1 1 W +X OE\ 1 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 8 500 500 100 L 40 40 1 1 O +X VCC 7 -500 900 100 R 40 40 1 1 W +X WE\ 6 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28LV64AVS +# Package Name: VSOP28-8X13 +# Dev Tech: LV +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28LV64AVS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 1150 50 H V L B +F1 "28LV64AVS" -400 -1300 50 H V L B +F2 "microchip-5-VSOP28-8X13" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 1000 400 1000 +P 2 1 0 0 400 1000 400 -1200 +P 2 1 0 0 400 -1200 -400 -1200 +P 2 1 0 0 -400 -1200 -400 1000 +X A0 10 -500 -900 100 R 40 40 1 1 I +X A1 9 -500 -800 100 R 40 40 1 1 I +X A2 8 -500 -700 100 R 40 40 1 1 I +X A3 7 -500 -600 100 R 40 40 1 1 I +X A4 6 -500 -500 100 R 40 40 1 1 I +X A5 5 -500 -400 100 R 40 40 1 1 I +X A6 4 -500 -300 100 R 40 40 1 1 I +X A7 3 -500 -200 100 R 40 40 1 1 I +X A8 25 -500 -100 100 R 40 40 1 1 I +X A9 24 -500 0 100 R 40 40 1 1 I +X A10 21 -500 100 100 R 40 40 1 1 I +X A11 23 -500 200 100 R 40 40 1 1 I +X A12 2 -500 300 100 R 40 40 1 1 I +X CE\ 20 -500 500 100 R 40 40 1 1 I +X D0 11 500 -400 100 L 40 40 1 1 T +X D1 12 500 -300 100 L 40 40 1 1 T +X D2 13 500 -200 100 L 40 40 1 1 T +X D3 15 500 -100 100 L 40 40 1 1 T +X D4 16 500 0 100 L 40 40 1 1 T +X D5 17 500 100 100 L 40 40 1 1 T +X D6 18 500 200 100 L 40 40 1 1 T +X D7 19 500 300 100 L 40 40 1 1 T +X GND 14 -500 -1100 100 R 40 40 1 1 W +X OE\ 22 -500 600 100 R 40 40 1 1 I +X RDY/BSY\ 1 500 500 100 L 40 40 1 1 O +X VCC 28 -500 900 100 R 40 40 1 1 W +X WE\ 27 -500 700 100 R 40 40 1 1 I +ENDDRAW +ENDDEF + +# +# Dev Name: 28VL64AL +# Package Name: PLCC-32 +# Dev Tech: VL +# Dev Prefix: IC +# Gate count = 1 +# +DEF 28VL64AL IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 28C64 +F0 "IC" -400 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PIC10F202OT +# Package Name: SOT23-6 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC10F202OT IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F200/2 +F0 "IC" -800 0 50 H V L B +F1 "PIC10F202OT" -1300 700 50 H V L B +F2 "microchip-5-SOT23-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1300 700 -400 700 +P 2 1 0 0 -400 700 -400 100 +P 2 1 0 0 -400 100 -1300 100 +P 2 1 0 0 -1300 100 -1300 700 +X GP0 1 -200 600 200 L 40 40 1 1 B +X GP1 3 -200 400 200 L 40 40 1 1 B +X GP2/T0CLK 4 -200 200 200 L 40 40 1 1 B +X GP3/MCLR 6 -1500 600 200 R 40 40 1 1 I +X VDD 5 -1500 400 200 R 40 40 1 1 W +X VSS 2 -1500 200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC10F202OT +# Package Name: SOT23-6 +# Dev Tech: 02 +# Dev Prefix: +# Gate count = 1 +# +DEF PIC10F202OT ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F204/6 +DRAW +P 2 1 0 0 -600 300 400 300 +P 2 1 0 0 400 300 400 -300 +P 2 1 0 0 400 -300 -600 -300 +P 2 1 0 0 -600 -300 -600 300 +X GP0/CI+ 1 600 200 200 L 40 40 1 1 B +X GP1/CI- 3 600 0 200 L 40 40 1 1 B +X GP2/T0CLK 4 600 -200 200 L 40 40 1 1 B +X GP3/MCLR 6 -800 200 200 R 40 40 1 1 I +X VDD 5 -800 0 200 R 40 40 1 1 W +X VSS 2 -800 -200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC10F202P +# Package Name: DIL8 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC10F202P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F200/2 +F0 "IC" -800 0 50 H V L B +F1 "PIC10F202P" -1300 700 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1300 700 -400 700 +P 2 1 0 0 -400 700 -400 100 +P 2 1 0 0 -400 100 -1300 100 +P 2 1 0 0 -1300 100 -1300 700 +X GP0 5 -200 600 200 L 40 40 1 1 B +X GP1 4 -200 400 200 L 40 40 1 1 B +X GP2/T0CLK 3 -200 200 200 L 40 40 1 1 B +X GP3/MCLR 8 -1500 600 200 R 40 40 1 1 I +X VDD 2 -1500 400 200 R 40 40 1 1 W +X VSS 7 -1500 200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC10F204OT +# Package Name: SOT23-6 +# Dev Tech: 04 +# Dev Prefix: +# Gate count = 1 +# +DEF PIC10F204OT ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F204/6 +DRAW +P 2 1 0 0 -600 300 400 300 +P 2 1 0 0 400 300 400 -300 +P 2 1 0 0 400 -300 -600 -300 +P 2 1 0 0 -600 -300 -600 300 +X GP0/CI+ 1 600 200 200 L 40 40 1 1 B +X GP1/CI- 3 600 0 200 L 40 40 1 1 B +X GP2/T0CLK 4 600 -200 200 L 40 40 1 1 B +X GP3/MCLR 6 -800 200 200 R 40 40 1 1 I +X VDD 5 -800 0 200 R 40 40 1 1 W +X VSS 2 -800 -200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC10F204P +# Package Name: DIL8 +# Dev Tech: 04 +# Dev Prefix: +# Gate count = 1 +# +DEF PIC10F204P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F204/6 +DRAW +P 2 1 0 0 -600 300 400 300 +P 2 1 0 0 400 300 400 -300 +P 2 1 0 0 400 -300 -600 -300 +P 2 1 0 0 -600 -300 -600 300 +X GP0/CI+ 5 600 200 200 L 40 40 1 1 B +X GP1/CI- 4 600 0 200 L 40 40 1 1 B +X GP2/T0CLK 3 600 -200 200 L 40 40 1 1 B +X GP3/MCLR 8 -800 200 200 R 40 40 1 1 I +X VDD 2 -800 0 200 R 40 40 1 1 W +X VSS 7 -800 -200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC10F206P +# Package Name: DIL8 +# Dev Tech: 06 +# Dev Prefix: +# Gate count = 1 +# +DEF PIC10F206P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC10F204/6 +DRAW +P 2 1 0 0 -600 300 400 300 +P 2 1 0 0 400 300 400 -300 +P 2 1 0 0 400 -300 -600 -300 +P 2 1 0 0 -600 -300 -600 300 +X GP0/CI+ 5 600 200 200 L 40 40 1 1 B +X GP1/CI- 4 600 0 200 L 40 40 1 1 B +X GP2/T0CLK 3 600 -200 200 L 40 40 1 1 B +X GP3/MCLR 8 -800 200 200 R 40 40 1 1 I +X VDD 2 -800 0 200 R 40 40 1 1 W +X VSS 7 -800 -200 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C508JN +# Package Name: DIL8 +# Dev Tech: 508 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C508JN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C508JN" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C508P +# Package Name: DIL8 +# Dev Tech: 508 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C508P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C508P" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C508SM +# Package Name: SO-08M +# Dev Tech: 508 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C508SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C508SM" -410 -410 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C509JN +# Package Name: DIL8 +# Dev Tech: 509 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C509JN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C509JN" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C509P +# Package Name: DIL8 +# Dev Tech: 509 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C509P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C509P" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C509SM +# Package Name: SO-08M +# Dev Tech: 509 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C509SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C509SM" -410 -410 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C671JN +# Package Name: DIL8 +# Dev Tech: 671 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C671JN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C671JN" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C671P +# Package Name: DIL8 +# Dev Tech: 671 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C671P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C671P" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C671SM +# Package Name: SO-08M +# Dev Tech: 671 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C671SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C671SM" -410 -410 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C672JN +# Package Name: DIL8 +# Dev Tech: 672 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C672JN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C672JN" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C672P +# Package Name: DIL8 +# Dev Tech: 672 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C672P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C672P" -410 -410 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12C672SM +# Package Name: SO-08M +# Dev Tech: 672 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12C672SM IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 6IO +F0 "IC" -400 440 50 H V L B +F1 "PIC12C672SM" -410 -410 50 H V L B +F2 "microchip-5-SO-08M" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 400 400 400 +P 2 1 0 0 400 400 400 -300 +P 2 1 0 0 400 -300 -400 -300 +P 2 1 0 0 -400 -300 -400 400 +X GP0 7 500 -200 100 L 40 40 1 1 B +X GP1 6 500 -100 100 L 40 40 1 1 B +X GP2 5 500 0 100 L 40 40 1 1 B +X GP3/MC 4 500 100 100 L 40 40 1 1 I +X GP4/COUT 3 500 200 100 L 40 40 1 1 B +X GP5/CIN 2 500 300 100 L 40 40 1 1 B +X VDD 1 -500 300 100 R 40 40 1 1 W +X VSS 8 -500 -200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12F629P +# Package Name: DIL8 +# Dev Tech: 29 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12F629P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC12F6* +F0 "IC" -1400 600 50 H V L B +F1 "PIC12F629P" -800 -200 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1400 600 -400 600 +P 2 1 0 0 -400 600 -400 -100 +P 2 1 0 0 -400 -100 -1400 -100 +P 2 1 0 0 -1400 -100 -1400 600 +X GP0/CI+/AN0 7 -200 500 200 L 40 40 1 1 B +X GP1/CI-/AN1 6 -200 400 200 L 40 40 1 1 B +X GP2/COUT/AN2 5 -200 300 200 L 40 40 1 1 B +X GP3/MCLR 4 -200 200 200 L 40 40 1 1 I +X GP4/T1G/AN3 3 -200 100 200 L 40 40 1 1 B +X GP5/T1CL 2 -200 0 200 L 40 40 1 1 B +X VDD 1 -1600 500 200 R 40 40 1 1 W +X VSS 8 -1600 0 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12F629SN +# Package Name: SO-08 +# Dev Tech: 29 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12F629SN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC12F6* +F0 "IC" -1400 600 50 H V L B +F1 "PIC12F629SN" -800 -200 50 H V L B +F2 "microchip-5-SO-08" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1400 600 -400 600 +P 2 1 0 0 -400 600 -400 -100 +P 2 1 0 0 -400 -100 -1400 -100 +P 2 1 0 0 -1400 -100 -1400 600 +X GP0/CI+/AN0 7 -200 500 200 L 40 40 1 1 B +X GP1/CI-/AN1 6 -200 400 200 L 40 40 1 1 B +X GP2/COUT/AN2 5 -200 300 200 L 40 40 1 1 B +X GP3/MCLR 4 -200 200 200 L 40 40 1 1 I +X GP4/T1G/AN3 3 -200 100 200 L 40 40 1 1 B +X GP5/T1CL 2 -200 0 200 L 40 40 1 1 B +X VDD 1 -1600 500 200 R 40 40 1 1 W +X VSS 8 -1600 0 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12F675P +# Package Name: DIL8 +# Dev Tech: 75 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12F675P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC12F6* +F0 "IC" -1400 600 50 H V L B +F1 "PIC12F675P" -800 -200 50 H V L B +F2 "microchip-5-DIL8" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1400 600 -400 600 +P 2 1 0 0 -400 600 -400 -100 +P 2 1 0 0 -400 -100 -1400 -100 +P 2 1 0 0 -1400 -100 -1400 600 +X GP0/CI+/AN0 7 -200 500 200 L 40 40 1 1 B +X GP1/CI-/AN1 6 -200 400 200 L 40 40 1 1 B +X GP2/COUT/AN2 5 -200 300 200 L 40 40 1 1 B +X GP3/MCLR 4 -200 200 200 L 40 40 1 1 I +X GP4/T1G/AN3 3 -200 100 200 L 40 40 1 1 B +X GP5/T1CL 2 -200 0 200 L 40 40 1 1 B +X VDD 1 -1600 500 200 R 40 40 1 1 W +X VSS 8 -1600 0 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC12F675SN +# Package Name: SO-08 +# Dev Tech: 75 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC12F675SN IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC12F6* +F0 "IC" -1400 600 50 H V L B +F1 "PIC12F675SN" -800 -200 50 H V L B +F2 "microchip-5-SO-08" 0 150 50 H I C C +DRAW +P 2 1 0 0 -1400 600 -400 600 +P 2 1 0 0 -400 600 -400 -100 +P 2 1 0 0 -400 -100 -1400 -100 +P 2 1 0 0 -1400 -100 -1400 600 +X GP0/CI+/AN0 7 -200 500 200 L 40 40 1 1 B +X GP1/CI-/AN1 6 -200 400 200 L 40 40 1 1 B +X GP2/COUT/AN2 5 -200 300 200 L 40 40 1 1 B +X GP3/MCLR 4 -200 200 200 L 40 40 1 1 I +X GP4/T1G/AN3 3 -200 100 200 L 40 40 1 1 B +X GP5/T1CL 2 -200 0 200 L 40 40 1 1 B +X VDD 1 -1600 500 200 R 40 40 1 1 W +X VSS 8 -1600 0 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16873P +# Package Name: DIL28-6 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16873P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16873P" 300 -1000 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16873SO +# Package Name: SO-28W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16873SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16873SO" 300 -1000 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C52JW +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C52JW IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C52JW" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C52P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C52P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C52P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C52SO +# Package Name: SO-18W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C52SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C52SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C52P +# Package Name: DIL18 +# Dev Tech: 52 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C52P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C52P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C52SO +# Package Name: SO-18W +# Dev Tech: 52 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C52SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C52SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54AP +# Package Name: DIL18 +# Dev Tech: 54A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C54AP" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54ASO +# Package Name: SO-18W +# Dev Tech: 54A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C54ASO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54ASS-20 +# Package Name: SSOP20 +# Dev Tech: 54A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54ASS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16C54ASS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54P +# Package Name: DIL18 +# Dev Tech: 54 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C54P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54SO +# Package Name: SO-18W +# Dev Tech: 54 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C54SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C54SS-20 +# Package Name: SSOP20 +# Dev Tech: 54 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C54SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16C54SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C55P +# Package Name: DIL28-6 +# Dev Tech: 5 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C55P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 20IO-2 +F0 "IC" -300 1050 50 H V L B +F1 "PIC16C55P" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1000 +P 2 1 0 0 400 1000 -300 1000 +P 2 1 0 0 -300 1000 -300 -1300 +X MCLR\ 28 -400 100 100 R 40 40 1 1 I +X NC 3 -300 -600 0 R 40 40 1 1 U +X NC@1 5 -300 -500 0 R 40 40 1 1 U +X OSC1 27 -400 500 100 R 40 40 1 1 I +X OSC2 26 -400 300 100 R 40 40 1 1 O +X RA0 6 500 -1200 100 L 40 40 1 1 B +X RA1 7 500 -1100 100 L 40 40 1 1 B +X RA2 8 500 -1000 100 L 40 40 1 1 B +X RA3 9 500 -900 100 L 40 40 1 1 B +X RB0 10 500 -700 100 L 40 40 1 1 B +X RB1 11 500 -600 100 L 40 40 1 1 B +X RB2 12 500 -500 100 L 40 40 1 1 B +X RB3 13 500 -400 100 L 40 40 1 1 B +X RB4 14 500 -300 100 L 40 40 1 1 B +X RB5 15 500 -200 100 L 40 40 1 1 B +X RB6 16 500 -100 100 L 40 40 1 1 B +X RB7 17 500 0 100 L 40 40 1 1 B +X RC0 18 500 200 100 L 40 40 1 1 B +X RC1 19 500 300 100 L 40 40 1 1 B +X RC2 20 500 400 100 L 40 40 1 1 B +X RC3 21 500 500 100 L 40 40 1 1 B +X RC4 22 500 600 100 L 40 40 1 1 B +X RC5 23 500 700 100 L 40 40 1 1 B +X RC6 24 500 800 100 L 40 40 1 1 B +X RC7 25 500 900 100 L 40 40 1 1 B +X T0CKI 1 -400 -100 100 R 40 40 1 1 I +X VDD 2 -400 900 100 R 40 40 1 1 W +X VSS 4 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C55P +# Package Name: DIL18 +# Dev Tech: 55 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C55P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C55P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C55SO +# Package Name: SO-18W +# Dev Tech: 55 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C55SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C55SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C55SO +# Package Name: SO-28W +# Dev Tech: 5 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C55SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 20IO-2 +F0 "IC" -300 1050 50 H V L B +F1 "PIC16C55SO" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1000 +P 2 1 0 0 400 1000 -300 1000 +P 2 1 0 0 -300 1000 -300 -1300 +X MCLR\ 28 -400 100 100 R 40 40 1 1 I +X NC 3 -300 -600 0 R 40 40 1 1 U +X NC@1 5 -300 -500 0 R 40 40 1 1 U +X OSC1 27 -400 500 100 R 40 40 1 1 I +X OSC2 26 -400 300 100 R 40 40 1 1 O +X RA0 6 500 -1200 100 L 40 40 1 1 B +X RA1 7 500 -1100 100 L 40 40 1 1 B +X RA2 8 500 -1000 100 L 40 40 1 1 B +X RA3 9 500 -900 100 L 40 40 1 1 B +X RB0 10 500 -700 100 L 40 40 1 1 B +X RB1 11 500 -600 100 L 40 40 1 1 B +X RB2 12 500 -500 100 L 40 40 1 1 B +X RB3 13 500 -400 100 L 40 40 1 1 B +X RB4 14 500 -300 100 L 40 40 1 1 B +X RB5 15 500 -200 100 L 40 40 1 1 B +X RB6 16 500 -100 100 L 40 40 1 1 B +X RB7 17 500 0 100 L 40 40 1 1 B +X RC0 18 500 200 100 L 40 40 1 1 B +X RC1 19 500 300 100 L 40 40 1 1 B +X RC2 20 500 400 100 L 40 40 1 1 B +X RC3 21 500 500 100 L 40 40 1 1 B +X RC4 22 500 600 100 L 40 40 1 1 B +X RC5 23 500 700 100 L 40 40 1 1 B +X RC6 24 500 800 100 L 40 40 1 1 B +X RC7 25 500 900 100 L 40 40 1 1 B +X T0CKI 1 -400 -100 100 R 40 40 1 1 I +X VDD 2 -400 900 100 R 40 40 1 1 W +X VSS 4 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C55SS +# Package Name: SSOP28 +# Dev Tech: 5 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C55SS IC 0 40 Y Y 1 L N +# Gate Name: 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NC 3 -300 -600 0 R 40 40 1 1 U +X NC@1 5 -300 -500 0 R 40 40 1 1 U +X OSC1 27 -400 500 100 R 40 40 1 1 I +X OSC2 26 -400 300 100 R 40 40 1 1 O +X RA0 6 500 -1200 100 L 40 40 1 1 B +X RA1 7 500 -1100 100 L 40 40 1 1 B +X RA2 8 500 -1000 100 L 40 40 1 1 B +X RA3 9 500 -900 100 L 40 40 1 1 B +X RB0 10 500 -700 100 L 40 40 1 1 B +X RB1 11 500 -600 100 L 40 40 1 1 B +X RB2 12 500 -500 100 L 40 40 1 1 B +X RB3 13 500 -400 100 L 40 40 1 1 B +X RB4 14 500 -300 100 L 40 40 1 1 B +X RB5 15 500 -200 100 L 40 40 1 1 B +X RB6 16 500 -100 100 L 40 40 1 1 B +X RB7 17 500 0 100 L 40 40 1 1 B +X RC0 18 500 200 100 L 40 40 1 1 B +X RC1 19 500 300 100 L 40 40 1 1 B +X RC2 20 500 400 100 L 40 40 1 1 B +X RC3 21 500 500 100 L 40 40 1 1 B +X RC4 22 500 600 100 L 40 40 1 1 B +X RC5 23 500 700 100 L 40 40 1 1 B +X RC6 24 500 800 100 L 40 40 1 1 B +X RC7 25 500 900 100 L 40 40 1 1 B +X T0CKI 1 -400 -100 100 R 40 40 1 1 I +X VDD 2 -400 900 100 R 40 40 1 1 W +X VSS 4 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF 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7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C57SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 20IO-2 +F0 "IC" -300 1050 50 H V L B +F1 "PIC16C57SO" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1000 +P 2 1 0 0 400 1000 -300 1000 +P 2 1 0 0 -300 1000 -300 -1300 +X MCLR\ 28 -400 100 100 R 40 40 1 1 I +X NC 3 -300 -600 0 R 40 40 1 1 U +X NC@1 5 -300 -500 0 R 40 40 1 1 U +X OSC1 27 -400 500 100 R 40 40 1 1 I +X OSC2 26 -400 300 100 R 40 40 1 1 O +X RA0 6 500 -1200 100 L 40 40 1 1 B +X RA1 7 500 -1100 100 L 40 40 1 1 B +X RA2 8 500 -1000 100 L 40 40 1 1 B +X RA3 9 500 -900 100 L 40 40 1 1 B +X RB0 10 500 -700 100 L 40 40 1 1 B +X RB1 11 500 -600 100 L 40 40 1 1 B +X RB2 12 500 -500 100 L 40 40 1 1 B +X RB3 13 500 -400 100 L 40 40 1 1 B +X RB4 14 500 -300 100 L 40 40 1 1 B +X RB5 15 500 -200 100 L 40 40 1 1 B +X RB6 16 500 -100 100 L 40 40 1 1 B +X RB7 17 500 0 100 L 40 40 1 1 B +X RC0 18 500 200 100 L 40 40 1 1 B +X RC1 19 500 300 100 L 40 40 1 1 B +X RC2 20 500 400 100 L 40 40 1 1 B +X RC3 21 500 500 100 L 40 40 1 1 B +X RC4 22 500 600 100 L 40 40 1 1 B +X RC5 23 500 700 100 L 40 40 1 1 B +X RC6 24 500 800 100 L 40 40 1 1 B +X RC7 25 500 900 100 L 40 40 1 1 B +X T0CKI 1 -400 -100 100 R 40 40 1 1 I +X VDD 2 -400 900 100 R 40 40 1 1 W +X VSS 4 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C57SS +# Package Name: SSOP28 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C57SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 20IO-2 +F0 "IC" -300 1050 50 H V L B +F1 "PIC16C57SS" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1000 +P 2 1 0 0 400 1000 -300 1000 +P 2 1 0 0 -300 1000 -300 -1300 +X MCLR\ 28 -400 100 100 R 40 40 1 1 I +X NC 3 -300 -600 0 R 40 40 1 1 U +X NC@1 5 -300 -500 0 R 40 40 1 1 U +X OSC1 27 -400 500 100 R 40 40 1 1 I +X OSC2 26 -400 300 100 R 40 40 1 1 O +X RA0 6 500 -1200 100 L 40 40 1 1 B +X RA1 7 500 -1100 100 L 40 40 1 1 B +X RA2 8 500 -1000 100 L 40 40 1 1 B +X RA3 9 500 -900 100 L 40 40 1 1 B +X RB0 10 500 -700 100 L 40 40 1 1 B +X RB1 11 500 -600 100 L 40 40 1 1 B +X RB2 12 500 -500 100 L 40 40 1 1 B +X RB3 13 500 -400 100 L 40 40 1 1 B +X RB4 14 500 -300 100 L 40 40 1 1 B +X RB5 15 500 -200 100 L 40 40 1 1 B +X RB6 16 500 -100 100 L 40 40 1 1 B +X RB7 17 500 0 100 L 40 40 1 1 B +X RC0 18 500 200 100 L 40 40 1 1 B +X RC1 19 500 300 100 L 40 40 1 1 B +X RC2 20 500 400 100 L 40 40 1 1 B +X RC3 21 500 500 100 L 40 40 1 1 B +X RC4 22 500 600 100 L 40 40 1 1 B +X RC5 23 500 700 100 L 40 40 1 1 B +X RC6 24 500 800 100 L 40 40 1 1 B +X RC7 25 500 900 100 L 40 40 1 1 B +X T0CKI 1 -400 -100 100 R 40 40 1 1 I +X VDD 2 -400 900 100 R 40 40 1 1 W +X VSS 4 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C58AP +# Package Name: DIL18 +# Dev Tech: 58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C58AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C58AP" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C58ASO +# Package Name: SO-18W +# Dev Tech: 58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C58ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C58ASO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C58ASS-20 +# Package Name: SSOP20 +# Dev Tech: 58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C58ASS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16C58ASS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C61P +# Package Name: DIL18 +# Dev Tech: 61 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C61P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C61P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C61SO +# Package Name: SO-18W +# Dev Tech: 61 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C61SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C61SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62AJW-28 +# Package Name: DIL28-6 +# Dev Tech: 62A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62AJW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62AJW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62AP-28 +# Package Name: DIL28-3 +# Dev Tech: 62A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62AP-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62AP-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62APS-28 +# Package Name: DIL28-3 +# Dev Tech: 62A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62APS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62APS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62ASO-28 +# Package Name: SO-28W +# Dev Tech: 62A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62ASO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62ASO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62ASS-28 +# Package Name: SSOP28 +# Dev Tech: 62A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62ASS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62ASS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C62PS-28 +# Package Name: DIL28-3 +# Dev Tech: 62 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C62PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C62PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C63JW-28 +# Package Name: DIL28-6 +# Dev Tech: 63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C63JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C63JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C63P-28 +# Package Name: DIL28-3 +# Dev Tech: 63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C63P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C63P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C63PS-28 +# Package Name: DIL28-3 +# Dev Tech: 63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C63PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C63PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C63SO-28 +# Package Name: SO-28W +# Dev Tech: 63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C63SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C63SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 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-1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64JW-40 +# Package Name: DIL40 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C64JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 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R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64L-44 +# Package Name: PLCC-44 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64L-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C64L-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 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RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64P-40 +# Package Name: DIL40 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C64P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X 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1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64PT-44 +# Package Name: TQFP44 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64PT-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C64PT-44" -400 -2200 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64AJW-40 +# Package Name: DIL40 +# Dev Tech: 64A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64AJW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C64AJW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 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40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64AL-44 +# Package Name: PLCC-44 +# Dev Tech: 64A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64AL-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C64AL-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 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RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64L-44 +# Package Name: PLCC-44 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 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R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C64P-40 +# Package Name: DIL40 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C64P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C64P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 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1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65JW-40 +# Package Name: DIL40 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 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40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B 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RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65PQ-44 +# Package Name: MQFP44-2 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65PQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65PQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 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900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65TQ-44 +# Package Name: TQFP44 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65TQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65TQ-44" -400 -2200 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65AJW-40 +# Package Name: DIL40 +# Dev Tech: A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65AJW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65AJW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65AJW-40 +# Package Name: DIL40 +# Dev Tech: 65A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65AJW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65AJW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B 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VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65AL-44 +# Package Name: PLCC-44 +# Dev Tech: 65A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65AL-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65AL-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65AP-40 +# Package Name: DIL40 +# Dev Tech: 65A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65AP-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65AP-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 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33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65APQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 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Package Name: MQFP44-2 +# Dev Tech: 65A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65APQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65APQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 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100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65ATQ-44 +# Package Name: TQFP44 +# Dev Tech: A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65ATQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65ATQ-44" -400 -2200 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 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40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65BJW-40 +# Package Name: DIL40 +# Dev Tech: B +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65BJW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65BJW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 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B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65BL-44 +# Package Name: PLCC-44 +# Dev Tech: B +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65BL-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65BL-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 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31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65BP-40 +# Package Name: DIL40 +# Dev Tech: B +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65BP-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65BP-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 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-400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65BTQ-44 +# Package Name: TQFP44 +# Dev Tech: B +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65BTQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65BTQ-44" -400 -2200 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 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500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65L-44 +# Package Name: PLCC-44 +# Dev Tech: 5 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65L-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C65L-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C65P-40 +# Package Name: DIL40 +# Dev Tech: 5 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C65P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C65P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66JW +# Package Name: DIL28-6 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66JW IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66JW" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66P +# Package Name: DIL28-3 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66P" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66SO +# Package Name: SO-28W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66SO" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66JW-28 +# Package Name: DIL28-6 +# Dev Tech: 66 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66P-28 +# Package Name: DIL28-3 +# Dev Tech: 66 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66PS-28 +# Package Name: DIL28-3 +# Dev Tech: 66 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66SO-28 +# Package Name: SO-28W +# Dev Tech: 66 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C66SS-28 +# Package Name: SSOP28 +# Dev Tech: 66 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C66SS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C66SS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C67JW-40 +# Package Name: DIL40 +# Dev Tech: 67 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C67JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C67JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C67L-44 +# Package Name: PLCC-44 +# Dev Tech: 67 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C67L-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C67L-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B 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PIC16C67P-40 +# Package Name: DIL40 +# Dev Tech: 67 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C67P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C67P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C67PQ-44 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500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C71P +# Package Name: DIL18 +# Dev Tech: 71 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C71P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C71P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C71SO +# Package Name: SO-18W +# Dev Tech: 71 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C71SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C71SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C72JW-28 +# Package Name: DIL28-6 +# Dev Tech: 72 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C72JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C72JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C72P-28 +# Package Name: DIL28-3 +# Dev Tech: 72 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C72P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C72P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C72PS-28 +# Package Name: DIL28-3 +# Dev Tech: 72 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C72PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C72PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C72SO-28 +# Package Name: SO-28W +# Dev Tech: 72 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C72SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C72SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C72SS-28 +# Package Name: SSOP28 +# Dev Tech: 72 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C72SS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C72SS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73P +# Package Name: DIL28-3 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73P" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73SO +# Package Name: SO-28W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73SO" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73AJW-28 +# Package Name: DIL28-6 +# Dev Tech: 73A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73AJW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73AJW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73AP-28 +# Package Name: DIL28-3 +# Dev Tech: 73A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73AP-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73AP-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73APS-28 +# Package Name: DIL28-3 +# Dev Tech: 73A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73APS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73APS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73ASO-28 +# Package Name: SO-28W +# Dev Tech: 73A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73ASO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73ASO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C73ASS-28 +# Package Name: SSOP28 +# Dev Tech: 73A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C73ASS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C73ASS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C74-44L +# Package Name: PLCC-44 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C74-44L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C74-44L" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C74-44PQ +# Package Name: MQFP44-2 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C74-44PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C74-44PQ" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 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0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C74AL-44 +# Package Name: PLCC-44 +# Dev Tech: 74A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C74AL-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C74AL-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C74AP-40 +# Package Name: DIL40 +# Dev Tech: 74A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C74AP-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C74AP-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C74APQ-44 +# Package Name: MQFP44-2 +# Dev Tech: 74A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C74APQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B 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500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C76JW-28 +# Package Name: DIL28-6 +# Dev Tech: 76 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C76JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C76JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C76P-28 +# Package Name: DIL28-3 +# Dev Tech: 76 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C76P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C76P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C76PS-28 +# Package Name: DIL28-3 +# Dev Tech: 76 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C76PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C76PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C76SO-28 +# Package Name: SO-28W +# Dev Tech: 76 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C76SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C76SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C76SS-28 +# Package Name: SSOP28 +# Dev Tech: 76 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C76SS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16C76SS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C77JW-40 +# Package Name: DIL40 +# Dev Tech: 77 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C77JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C77JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C77L-44 +# Package Name: PLCC-44 +# Dev Tech: 77 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C77L-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C77L-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C77P-40 +# Package Name: DIL40 +# Dev Tech: 77 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C77P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16C77P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C77PQ-44 +# Package Name: MQFP44-2 +# Dev Tech: 77 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C77PQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16C77PQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C84P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C84P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16C84P" -400 -900 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C84SO +# Package Name: SO-18W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C84SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16C84SO" -400 -900 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C84P +# Package Name: DIL18 +# Dev Tech: 84 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C84P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C84P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C84SO +# Package Name: SO-18W +# Dev Tech: 84 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C84SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C84SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C154P +# Package Name: DIL18 +# Dev Tech: 154 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C154P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C154P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C154SO +# Package Name: SO-18W +# Dev Tech: 154 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C154SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C154SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 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= 1 +# +DEF PIC16C158P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C158P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C158SO +# Package Name: SO-18W +# Dev Tech: 158 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C158SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C158SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C158SS-20 +# Package Name: SSOP20 +# Dev Tech: 158 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C158SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16C158SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 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600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C554SS-20 +# Package Name: SSOP20 +# Dev Tech: 554 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C554SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16C554SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16C556P +# Package Name: DIL18 +# Dev Tech: 556 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16C556P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16C556P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C 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PIC16CR54ASS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16CR54ASS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR54P +# Package Name: DIL18 +# Dev Tech: R54 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR54P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR54P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR54SO +# Package Name: SO-18W +# Dev Tech: R54 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR54SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR54SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR58AP +# Package Name: DIL18 +# Dev Tech: R58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR58AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR58AP" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR58ASO +# Package Name: SO-18W +# Dev Tech: R58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR58ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR58ASO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR58ASS-20 +# Package Name: SSOP20 +# Dev Tech: R58A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR58ASS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16CR58ASS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR62JW-28 +# Package Name: DIL28-6 +# Dev Tech: R62 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR62JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR62JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR62P-28 +# Package Name: DIL28-3 +# Dev Tech: R62 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR62P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR62P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR62SO-28 +# Package Name: SO-28W +# Dev Tech: R62 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR62SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR62SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR62SS-28 +# Package Name: SSOP28 +# Dev Tech: R62 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR62SS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR62SS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR63JW-28 +# Package Name: DIL28-6 +# Dev Tech: R63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR63JW-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR63JW-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR63P-28 +# Package Name: DIL28-3 +# Dev Tech: R63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR63P-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR63P-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR63PS-28 +# Package Name: DIL28-3 +# Dev Tech: R63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR63PS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR63PS-28" -300 -1400 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR63SO-28 +# Package Name: SO-28W +# Dev Tech: R63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR63SO-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR63SO-28" -300 -1400 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR63SS-28 +# Package Name: SSOP28 +# Dev Tech: R63 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR63SS-28 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 22IO-1 +F0 "IC" -300 1250 50 H V L B +F1 "PIC16CR63SS-28" -300 -1400 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1300 400 -1300 +P 2 1 0 0 400 -1300 400 1200 +P 2 1 0 0 400 1200 -300 1200 +P 2 1 0 0 -300 1200 -300 -1300 +T 0 -120 -1200 60 0 1 0 VSS +X MCLR\ 1 -400 200 100 R 40 40 1 1 I +X OSC1 9 -400 600 100 R 40 40 1 1 B +X OSC2 10 -400 400 100 R 40 40 1 1 B +X RA0 2 500 -1200 100 L 40 40 1 1 B +X RA1 3 500 -1100 100 L 40 40 1 1 B +X RA2 4 500 -1000 100 L 40 40 1 1 B +X RA3 5 500 -900 100 L 40 40 1 1 B +X RA4 6 500 -800 100 L 40 40 1 1 B +X RA5 7 500 -700 100 L 40 40 1 1 B +X RB0 21 500 -500 100 L 40 40 1 1 B +X RB1 22 500 -400 100 L 40 40 1 1 B +X RB2 23 500 -300 100 L 40 40 1 1 B +X RB3 24 500 -200 100 L 40 40 1 1 B +X RB4 25 500 -100 100 L 40 40 1 1 B +X RB5 26 500 0 100 L 40 40 1 1 B +X RB6 27 500 100 100 L 40 40 1 1 B +X RB7 28 500 200 100 L 40 40 1 1 B +X RC0 11 500 400 100 L 40 40 1 1 B +X RC1 12 500 500 100 L 40 40 1 1 B +X RC2 13 500 600 100 L 40 40 1 1 B +X RC3 14 500 700 100 L 40 40 1 1 B +X RC4 15 500 800 100 L 40 40 1 1 B +X RC5 16 500 900 100 L 40 40 1 1 B +X RC6 17 500 1000 100 L 40 40 1 1 B +X RC7 18 500 1100 100 L 40 40 1 1 B +X VDD 20 -400 1100 100 R 40 40 1 1 W +X VSS 8 -400 -1100 100 R 40 40 1 1 W +X VSS@1 19 -400 -1200 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR64JW-40 +# Package Name: DIL40 +# Dev Tech: R64 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR64JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16CR64JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 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RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR64P-40 +# Package Name: DIL40 +# Dev Tech: R64 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR64P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16CR64P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR64PQ-44 +# Package Name: MQFP44-2 +# Dev Tech: R64 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR64PQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16CR64PQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR65JW-40 +# Package Name: DIL40 +# Dev Tech: R65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR65JW-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16CR65JW-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR65L-44 +# Package Name: PLCC-44 +# Dev Tech: R65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR65L-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16CR65L-44" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 2 -500 700 100 R 40 40 1 1 I +X NC 1 -400 -600 0 R 40 40 1 1 U +X NC@1 17 -400 -700 0 R 40 40 1 1 U +X NC@2 28 -400 -800 0 R 40 40 1 1 U +X NC@3 40 -400 -900 0 R 40 40 1 1 U +X OSC1 14 -500 1100 100 R 40 40 1 1 I +X OSC2 15 -500 900 100 R 40 40 1 1 O +X RA0 3 500 -2000 100 L 40 40 1 1 B +X RA1 4 500 -1900 100 L 40 40 1 1 B +X RA2 5 500 -1800 100 L 40 40 1 1 B +X RA3 6 500 -1700 100 L 40 40 1 1 B +X RA4 7 500 -1600 100 L 40 40 1 1 B +X RA5 8 500 -1500 100 L 40 40 1 1 B +X RB0 36 500 -1300 100 L 40 40 1 1 B +X RB1 37 500 -1200 100 L 40 40 1 1 B +X RB2 38 500 -1100 100 L 40 40 1 1 B +X RB3 39 500 -1000 100 L 40 40 1 1 B +X RB4 41 500 -900 100 L 40 40 1 1 B +X RB5 42 500 -800 100 L 40 40 1 1 B +X RB6 43 500 -700 100 L 40 40 1 1 B +X RB7 44 500 -600 100 L 40 40 1 1 B +X RC0 16 500 -400 100 L 40 40 1 1 B +X RC1 18 500 -300 100 L 40 40 1 1 B +X RC2 19 500 -200 100 L 40 40 1 1 B +X RC3 20 500 -100 100 L 40 40 1 1 B +X RC4 25 500 0 100 L 40 40 1 1 B +X RC5 26 500 100 100 L 40 40 1 1 B +X RC6 27 500 200 100 L 40 40 1 1 B +X RC7 29 500 300 100 L 40 40 1 1 B +X RD0 21 500 500 100 L 40 40 1 1 B +X RD1 22 500 600 100 L 40 40 1 1 B +X RD2 23 500 700 100 L 40 40 1 1 B +X RD3 24 500 800 100 L 40 40 1 1 B +X RD4 30 500 900 100 L 40 40 1 1 B +X RD5 31 500 1000 100 L 40 40 1 1 B +X RD6 32 500 1100 100 L 40 40 1 1 B +X RD7 33 500 1200 100 L 40 40 1 1 B +X RE0 9 500 1400 100 L 40 40 1 1 B +X RE1 10 500 1500 100 L 40 40 1 1 B +X RE2 11 500 1600 100 L 40 40 1 1 B +X VDD 12 -500 1600 100 R 40 40 1 1 W +X VDD@1 35 -500 1500 100 R 40 40 1 1 W +X VSS 13 -500 -1900 100 R 40 40 1 1 W +X VSS@1 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR65P-40 +# Package Name: DIL40 +# Dev Tech: R65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR65P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1A +F0 "IC" -400 1950 50 H V L B +F1 "PIC16CR65P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 1700 60 0 1 0 VDD +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 1 -500 900 100 R 40 40 1 1 I +X OSC1 13 -500 1300 100 R 40 40 1 1 I +X OSC2 14 -500 1100 100 R 40 40 1 1 O +X RA0 2 500 -1800 100 L 40 40 1 1 B +X RA1 3 500 -1700 100 L 40 40 1 1 B +X RA2 4 500 -1600 100 L 40 40 1 1 B +X RA3 5 500 -1500 100 L 40 40 1 1 B +X RA4 6 500 -1400 100 L 40 40 1 1 B +X RA5 7 500 -1300 100 L 40 40 1 1 B +X RB0 33 500 -1100 100 L 40 40 1 1 B +X RB1 34 500 -1000 100 L 40 40 1 1 B +X RB2 35 500 -900 100 L 40 40 1 1 B +X RB3 36 500 -800 100 L 40 40 1 1 B +X RB4 37 500 -700 100 L 40 40 1 1 B +X RB5 38 500 -600 100 L 40 40 1 1 B +X RB6 39 500 -500 100 L 40 40 1 1 B +X RB7 40 500 -400 100 L 40 40 1 1 B +X RC0 15 500 -200 100 L 40 40 1 1 O +X RC1 16 500 -100 100 L 40 40 1 1 O +X RC2 17 500 0 100 L 40 40 1 1 O +X RC3 18 500 100 100 L 40 40 1 1 O +X RC4 23 500 200 100 L 40 40 1 1 O +X RC5 24 500 300 100 L 40 40 1 1 O +X RC6 25 500 400 100 L 40 40 1 1 O +X RC7 26 500 500 100 L 40 40 1 1 O +X RD0 19 500 700 100 L 40 40 1 1 B +X RD1 20 500 800 100 L 40 40 1 1 B +X RD2 21 500 900 100 L 40 40 1 1 B +X RD3 22 500 1000 100 L 40 40 1 1 B +X RD4 27 500 1100 100 L 40 40 1 1 B +X RD5 28 500 1200 100 L 40 40 1 1 B +X RD6 29 500 1300 100 L 40 40 1 1 B +X RD7 30 500 1400 100 L 40 40 1 1 B +X RE0 8 500 1600 100 L 40 40 1 1 B +X RE1 9 500 1700 100 L 40 40 1 1 B +X RE2 10 500 1800 100 L 40 40 1 1 B +X VDD 11 -500 1800 100 R 40 40 1 1 W +X VDD@1 32 -500 1700 100 R 40 40 1 1 W +X VSS 12 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR65PQ-44 +# Package Name: MQFP44-2 +# Dev Tech: R65 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR65PQ-44 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC16CR65PQ-44" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -220 -2000 60 0 1 0 VSS +X MCLR\ 18 -500 700 100 R 40 40 1 1 I +X NC 12 -400 -600 0 R 40 40 1 1 U +X NC@1 13 -400 -700 0 R 40 40 1 1 U +X NC@2 33 -400 -800 0 R 40 40 1 1 U +X NC@3 34 -400 -900 0 R 40 40 1 1 U +X OSC1 30 -500 1100 100 R 40 40 1 1 I +X OSC2 31 -500 900 100 R 40 40 1 1 O +X RA0 19 500 -2000 100 L 40 40 1 1 B +X RA1 20 500 -1900 100 L 40 40 1 1 B +X RA2 21 500 -1800 100 L 40 40 1 1 B +X RA3 22 500 -1700 100 L 40 40 1 1 B +X RA4 23 500 -1600 100 L 40 40 1 1 B +X RA5 24 500 -1500 100 L 40 40 1 1 B +X RB0 8 500 -1300 100 L 40 40 1 1 B +X RB1 9 500 -1200 100 L 40 40 1 1 B +X RB2 10 500 -1100 100 L 40 40 1 1 B +X RB3 11 500 -1000 100 L 40 40 1 1 B +X RB4 14 500 -900 100 L 40 40 1 1 B +X RB5 15 500 -800 100 L 40 40 1 1 B +X RB6 16 500 -700 100 L 40 40 1 1 B +X RB7 17 500 -600 100 L 40 40 1 1 B +X RC0 32 500 -400 100 L 40 40 1 1 B +X RC1 35 500 -300 100 L 40 40 1 1 B +X RC2 36 500 -200 100 L 40 40 1 1 B +X RC3 37 500 -100 100 L 40 40 1 1 B +X RC4 42 500 0 100 L 40 40 1 1 B +X RC5 43 500 100 100 L 40 40 1 1 B +X RC6 44 500 200 100 L 40 40 1 1 B +X RC7 1 500 300 100 L 40 40 1 1 B +X RD0 38 500 500 100 L 40 40 1 1 B +X RD1 39 500 600 100 L 40 40 1 1 B +X RD2 40 500 700 100 L 40 40 1 1 B +X RD3 41 500 800 100 L 40 40 1 1 B +X RD4 2 500 900 100 L 40 40 1 1 B +X RD5 3 500 1000 100 L 40 40 1 1 B +X RD6 4 500 1100 100 L 40 40 1 1 B +X RD7 5 500 1200 100 L 40 40 1 1 B +X RE0 25 500 1400 100 L 40 40 1 1 B +X RE1 26 500 1500 100 L 40 40 1 1 B +X RE2 27 500 1600 100 L 40 40 1 1 B +X VDD 7 -500 1600 100 R 40 40 1 1 W +X VDD@1 28 -500 1500 100 R 40 40 1 1 W +X VSS 6 -500 -1900 100 R 40 40 1 1 W +X VSS@1 29 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR83P +# Package Name: DIL18 +# Dev Tech: R83 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR83P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR83P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR83SO +# Package Name: SO-18W +# Dev Tech: R83 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR83SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR83SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR84P +# Package Name: DIL18 +# Dev Tech: R84 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR84P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR84P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR84SO +# Package Name: SO-18W +# Dev Tech: R84 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR84SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR84SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR154P +# Package Name: DIL18 +# Dev Tech: R154 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR154P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR154P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR154SO +# Package Name: SO-18W +# Dev Tech: R154 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR154SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR154SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR154SS-20 +# Package Name: SSOP20 +# Dev Tech: R154 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR154SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16CR154SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR156P +# Package Name: DIL18 +# Dev Tech: R156 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR156P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR156P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 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"microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR156SS-20 +# Package Name: SSOP20 +# Dev Tech: R156 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR156SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16CR156SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR158P +# Package Name: DIL18 +# Dev Tech: R158 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR158P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR158P" -400 -700 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR158SO +# Package Name: SO-18W +# Dev Tech: R158 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR158SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-2 +F0 "IC" -400 850 50 H V L B +F1 "PIC16CR158SO" -400 -700 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 800 400 800 +P 2 1 0 0 400 800 400 -600 +P 2 1 0 0 400 -600 -400 -600 +P 2 1 0 0 -400 -600 -400 800 +X MCLR\ 4 -600 0 200 R 40 40 1 1 I +X OSC1 16 -600 400 200 R 40 40 1 1 I +X OSC2 15 -600 200 200 R 40 40 1 1 O +X RA0 17 600 -500 200 L 40 40 1 1 B +X RA1 18 600 -400 200 L 40 40 1 1 B +X RA2 1 600 -300 200 L 40 40 1 1 B +X RA3 2 600 -200 200 L 40 40 1 1 B +X RB0 6 600 0 200 L 40 40 1 1 B +X RB1 7 600 100 200 L 40 40 1 1 B +X RB2 8 600 200 200 L 40 40 1 1 B +X RB3 9 600 300 200 L 40 40 1 1 B +X RB4 10 600 400 200 L 40 40 1 1 B +X RB5 11 600 500 200 L 40 40 1 1 B +X RB6 12 600 600 200 L 40 40 1 1 B +X RB7 13 600 700 200 L 40 40 1 1 B +X T0CKI 3 -600 -300 200 R 40 40 1 1 I +X VDD 14 -600 700 200 R 40 40 1 1 W +X VSS 5 -600 -500 200 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16CR158SS-20 +# Package Name: SSOP20 +# Dev Tech: R158 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16CR158SS-20 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1SS +F0 "IC" -400 750 50 H V L B +F1 "PIC16CR158SS-20" -400 -900 50 H V L B +F2 "microchip-5-SSOP20" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +T 0 -220 500 60 0 1 0 VDD +T 0 -220 -700 60 0 1 0 VSS +X MCLR\ 4 -500 -200 100 R 40 40 1 1 I +X OSC1 18 -500 200 100 R 40 40 1 1 I +X OSC2 17 -500 0 100 R 40 40 1 1 O +X RA0 19 500 -700 100 L 40 40 1 1 B +X RA1 20 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RA4 3 500 -300 100 L 40 40 1 1 B +X RB0 7 500 -100 100 L 40 40 1 1 B +X RB1 8 500 0 100 L 40 40 1 1 B +X RB2 9 500 100 100 L 40 40 1 1 B +X RB3 10 500 200 100 L 40 40 1 1 B +X RB4 11 500 300 100 L 40 40 1 1 B +X RB5 12 500 400 100 L 40 40 1 1 B +X RB6 13 500 500 100 L 40 40 1 1 B +X RB7 14 500 600 100 L 40 40 1 1 B +X VDD 15 -500 600 100 R 40 40 1 1 W +X VDD@1 16 -500 500 100 R 40 40 1 1 W +X VSS 5 -500 -600 100 R 40 40 1 1 W +X VSS@1 6 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F83P +# Package Name: DIL18 +# Dev Tech: 3 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F83P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16F83P" -400 -900 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F83SO +# Package Name: SO-18W +# Dev Tech: 3 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F83SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16F83SO" -400 -900 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F84AP +# Package Name: DIL18 +# Dev Tech: 4A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F84AP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16F84AP" -400 -900 50 H V L B +F2 "microchip-5-DIL18" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F84ASO +# Package Name: SO-18W +# Dev Tech: 4A +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F84ASO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 13IO-1 +F0 "IC" -400 750 50 H V L B +F1 "PIC16F84ASO" -400 -900 50 H V L B +F2 "microchip-5-SO-18W" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -800 -400 -800 +P 2 1 0 0 -400 -800 -400 700 +P 2 1 0 0 -400 700 400 700 +P 2 1 0 0 400 700 400 -800 +X MCLR\ 4 -500 -100 100 R 40 40 1 1 I +X OSC1 16 -500 300 100 R 40 40 1 1 I +X OSC2 15 -500 100 100 R 40 40 1 1 O +X RA0 17 500 -700 100 L 40 40 1 1 B +X RA1 18 500 -600 100 L 40 40 1 1 B +X RA2 1 500 -500 100 L 40 40 1 1 B +X RA3 2 500 -400 100 L 40 40 1 1 B +X RB0 6 500 -100 100 L 40 40 1 1 B +X RB1 7 500 0 100 L 40 40 1 1 B +X RB2 8 500 100 100 L 40 40 1 1 B +X RB3 9 500 200 100 L 40 40 1 1 B +X RB4 10 500 300 100 L 40 40 1 1 B +X RB5 11 500 400 100 L 40 40 1 1 B +X RB6 12 500 500 100 L 40 40 1 1 B +X RB7 13 500 600 100 L 40 40 1 1 B +X T0CKI/RA4 3 500 -300 100 L 40 40 1 1 B +X VDD 14 -500 600 100 R 40 40 1 1 W +X VSS 5 -500 -700 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F505 +# Package Name: DIL14 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F505 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F505 +F0 "IC" -700 750 50 H V L B +F1 "PIC16F505" -700 -800 50 H V L B +F2 "microchip-5-DIL14" 0 150 50 H I C C +DRAW +P 2 1 0 0 400 -700 -700 -700 +P 2 1 0 0 -700 -700 -700 700 +P 2 1 0 0 -700 700 400 700 +P 2 1 0 0 400 700 400 -700 +X RB0/ICSPDAT 13 500 -600 100 L 40 40 1 1 B +X RB1/ICSPCLK 12 500 -500 100 L 40 40 1 1 B +X RB2 11 500 -400 100 L 40 40 1 1 B +X RB3/MCLR/VPP 4 500 -300 100 L 40 40 1 1 B +X RB4/OSC2/CLKOUT 3 500 -200 100 L 40 40 1 1 B +X RB5/OSC1/CLKIN 2 500 -100 100 L 40 40 1 1 B +X RC0 10 500 100 100 L 40 40 1 1 B +X RC1 9 500 200 100 L 40 40 1 1 B +X RC2 8 500 300 100 L 40 40 1 1 B +X RC3 7 500 400 100 L 40 40 1 1 B +X RC4 6 500 500 100 L 40 40 1 1 B +X RC5/T0CKI 5 500 600 100 L 40 40 1 1 B +X VDD 1 -800 600 100 R 40 40 1 1 W +X VSS 14 -800 -600 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F627AI/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F627AI/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F627* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F627I/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F627I/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F627* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F628AI/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F628AI/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F628* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F628I/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F628I/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F628* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F631IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F631IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F631* +DRAW +P 2 1 0 0 1700 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1700 2100 +P 2 1 0 0 1700 2100 1700 0 +X RA0/C1IN+/ICSPDAT/ULPWU 19 1800 100 100 L 40 40 1 1 B +X RA1/C12IN0-/ICSPCLK 18 1800 200 100 L 40 40 1 1 B +X RA2/T0CKI/INT/C1OUT 17 1800 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 1800 400 100 L 40 40 1 1 B +X RA4/T1G/OSC2/CLKOUT 3 1800 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 1800 600 100 L 40 40 1 1 B +X RB4 13 1800 800 100 L 40 40 1 1 B +X RB5 12 1800 900 100 L 40 40 1 1 B +X RB6 11 1800 1000 100 L 40 40 1 1 B +X RB7 10 1800 1100 100 L 40 40 1 1 B +X RC0/C2IN+ 16 1800 1300 100 L 40 40 1 1 B +X RC1/C12IN1- 15 1800 1400 100 L 40 40 1 1 B +X RC2/C12IN2- 14 1800 1500 100 L 40 40 1 1 B +X RC3/C12IN3- 7 1800 1600 100 L 40 40 1 1 B +X RC4/C2OUT 6 1800 1700 100 L 40 40 1 1 B +X RC5 5 1800 1800 100 L 40 40 1 1 B +X RC6 8 1800 1900 100 L 40 40 1 1 B +X RC7 9 1800 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F648AI/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F648AI/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F648* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F648I/P +# Package Name: DIL18 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F648I/P ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F648* +DRAW +P 2 1 0 0 1200 0 0 0 +P 2 1 0 0 0 0 0 1800 +P 2 1 0 0 0 1800 1200 1800 +P 2 1 0 0 1200 1800 1200 0 +X RA0/AN0 17 1300 100 100 L 40 40 1 1 B +X RA1/AN1 18 1300 200 100 L 40 40 1 1 B +X RA2/AN2/VREF 1 1300 300 100 L 40 40 1 1 B +X RA3/AN3/CMP1 2 1300 400 100 L 40 40 1 1 B +X RA4/T0CKI/CMP2 3 1300 500 100 L 40 40 1 1 B +X RA5/MCLR/VPP 4 1300 600 100 L 40 40 1 1 B +X RA6/OSC2/CLKOUT 15 1300 700 100 L 40 40 1 1 B +X RA7/OSC1/CLKIN 16 1300 800 100 L 40 40 1 1 B +X RB0/INT 6 1300 1000 100 L 40 40 1 1 B +X RB1/RX/DT 7 1300 1100 100 L 40 40 1 1 B +X RB2/TX/CK 8 1300 1200 100 L 40 40 1 1 B +X RB3/CCP1 9 1300 1300 100 L 40 40 1 1 B +X RB4/PGM 10 1300 1400 100 L 40 40 1 1 B +X RB5 11 1300 1500 100 L 40 40 1 1 B +X RB6/T1OSO/T1CKI/PGC 12 1300 1600 100 L 40 40 1 1 B +X RB7/T1OSI/PGD 13 1300 1700 100 L 40 40 1 1 B +X VDD 14 -100 1700 100 R 40 40 1 1 W +X VSS 5 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F677IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F677IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F677* +DRAW +P 2 1 0 0 1900 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1900 2100 +P 2 1 0 0 1900 2100 1900 0 +X RA0/AN0/C1IN+/ICSPDAT/ULPWU 19 2000 100 100 L 40 40 1 1 B +X RA1/AN1/C12IN0-/VREF/ICSPCLK 18 2000 200 100 L 40 40 1 1 B +X RA2/AN2/T0CKI/INT/C1OUT 17 2000 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 2000 400 100 L 40 40 1 1 B +X RA4/AN3/T1G/OSC2/CLKOUT 3 2000 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 2000 600 100 L 40 40 1 1 B +X RB4/AN10/SDI/SDA 13 2000 800 100 L 40 40 1 1 B +X RB5/AN11 12 2000 900 100 L 40 40 1 1 B +X RB6/SCK/SCL 11 2000 1000 100 L 40 40 1 1 B +X RB7 10 2000 1100 100 L 40 40 1 1 B +X RC0/AN4/C2IN+ 16 2000 1300 100 L 40 40 1 1 B +X RC1/AN5/C12IN1- 15 2000 1400 100 L 40 40 1 1 B +X RC2/AN6/C12IN2- 14 2000 1500 100 L 40 40 1 1 B +X RC3/AN7C12IN3- 7 2000 1600 100 L 40 40 1 1 B +X RC4/C2OUT 6 2000 1700 100 L 40 40 1 1 B +X RC5 5 2000 1800 100 L 40 40 1 1 B +X RC6/AN8/SS 8 2000 1900 100 L 40 40 1 1 B +X RC7/AN9/SDO 9 2000 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F685IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F685IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F685* +DRAW +P 2 1 0 0 1900 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1900 2100 +P 2 1 0 0 1900 2100 1900 0 +X RA0/AN0/C1IN+/ICSPDAT/ULPWU 19 2000 100 100 L 40 40 1 1 B +X RA1/AN1/C12IN0-/VREF/ICSPCLK 18 2000 200 100 L 40 40 1 1 B +X RA2/AN2/T0CKI/INT/C1OUT 17 2000 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 2000 400 100 L 40 40 1 1 B +X RA4/AN3/T1G/OSC2/CLKOUT 3 2000 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 2000 600 100 L 40 40 1 1 B +X RB4/AN10 13 2000 800 100 L 40 40 1 1 B +X RB5/AN11 12 2000 900 100 L 40 40 1 1 B +X RB6 11 2000 1000 100 L 40 40 1 1 B +X RB7 10 2000 1100 100 L 40 40 1 1 B +X RC0/AN4/C2IN+ 16 2000 1300 100 L 40 40 1 1 B +X RC1/AN5/C12IN1- 15 2000 1400 100 L 40 40 1 1 B +X RC2/AN6/C12IN2-/P1D 14 2000 1500 100 L 40 40 1 1 B +X RC3/AN7/C12IN3-/P1C 7 2000 1600 100 L 40 40 1 1 B +X RC4/C2OUT/P1B 6 2000 1700 100 L 40 40 1 1 B +X RC5/CCP1/P1A 5 2000 1800 100 L 40 40 1 1 B +X RC6/AN8 8 2000 1900 100 L 40 40 1 1 B +X RC7/AN9 9 2000 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F687IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F687IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F687* +DRAW +P 2 1 0 0 1900 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1900 2100 +P 2 1 0 0 1900 2100 1900 0 +X RA0/AN0/C1IN+/ICSPDAT/ULPWU 19 2000 100 100 L 40 40 1 1 B +X RA1/AN1/C12IN0-/VREF/ICSPCLK 18 2000 200 100 L 40 40 1 1 B +X RA2/AN2/T0CKI/INT/C1OUT 17 2000 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 2000 400 100 L 40 40 1 1 B +X RA4/AN3/T1G/OSC2/CLKOUT 3 2000 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 2000 600 100 L 40 40 1 1 B +X RB4/AN10/SDI/SDA 13 2000 800 100 L 40 40 1 1 B +X RB5/AN11/RX/DT 12 2000 900 100 L 40 40 1 1 B +X RB6/SCK/SCL 11 2000 1000 100 L 40 40 1 1 B +X RB7/TX/CK 10 2000 1100 100 L 40 40 1 1 B +X RC0/AN4/C2IN+ 16 2000 1300 100 L 40 40 1 1 B +X RC1/AN5/C12IN1- 15 2000 1400 100 L 40 40 1 1 B +X RC2/AN6/C12IN2- 14 2000 1500 100 L 40 40 1 1 B +X RC3/AN7C12IN3- 7 2000 1600 100 L 40 40 1 1 B +X RC4/C2OUT 6 2000 1700 100 L 40 40 1 1 B +X RC5 5 2000 1800 100 L 40 40 1 1 B +X RC6/AN8/SS 8 2000 1900 100 L 40 40 1 1 B +X RC7/AN9/SDO 9 2000 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F689IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F689IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F689* +DRAW +P 2 1 0 0 1900 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1900 2100 +P 2 1 0 0 1900 2100 1900 0 +X RA0/AN0/C1IN+/ICSPDAT/ULPWU 19 2000 100 100 L 40 40 1 1 B +X RA1/AN1/C12IN0-/VREF/ICSPCLK 18 2000 200 100 L 40 40 1 1 B +X RA2/AN2/T0CKI/INT/C1OUT 17 2000 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 2000 400 100 L 40 40 1 1 B +X RA4/AN3/T1G/OSC2/CLKOUT 3 2000 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 2000 600 100 L 40 40 1 1 B +X RB4/AN10/SDI/SDA 13 2000 800 100 L 40 40 1 1 B +X RB5/AN11/RX/DT 12 2000 900 100 L 40 40 1 1 B +X RB6/SCK/SCL 11 2000 1000 100 L 40 40 1 1 B +X RB7/TX/CK 10 2000 1100 100 L 40 40 1 1 B +X RC0/AN4/C2IN+ 16 2000 1300 100 L 40 40 1 1 B +X RC1/AN5/C12IN1- 15 2000 1400 100 L 40 40 1 1 B +X RC2/AN6/C12IN2- 14 2000 1500 100 L 40 40 1 1 B +X RC3/AN7C12IN3- 7 2000 1600 100 L 40 40 1 1 B +X RC4/C2OUT 6 2000 1700 100 L 40 40 1 1 B +X RC5 5 2000 1800 100 L 40 40 1 1 B +X RC6/AN8/SS 8 2000 1900 100 L 40 40 1 1 B +X RC7/AN9/SDO 9 2000 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F690IP +# Package Name: DIL20 +# Dev Tech: '' +# Dev Prefix: +# Gate count = 1 +# +DEF PIC16F690IP ?? 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F690* +DRAW +P 2 1 0 0 1900 0 0 0 +P 2 1 0 0 0 0 0 2100 +P 2 1 0 0 0 2100 1900 2100 +P 2 1 0 0 1900 2100 1900 0 +X RA0/AN0/C1IN+/ICSPDAT/ULPWU 19 2000 100 100 L 40 40 1 1 B +X RA1/AN1/C12IN0-/VREF/ICSPCLK 18 2000 200 100 L 40 40 1 1 B +X RA2/AN2/T0CKI/INT/C1OUT 17 2000 300 100 L 40 40 1 1 B +X RA3/MCLR/VPP 4 2000 400 100 L 40 40 1 1 B +X RA4/AN3/T1G/OSC2/CLKOUT 3 2000 500 100 L 40 40 1 1 B +X RA5/T1CKI/OSC1/CLKIN 2 2000 600 100 L 40 40 1 1 B +X RB4/AN10/SDI/SDA 13 2000 800 100 L 40 40 1 1 B +X RB5/AN11/RX/DT 12 2000 900 100 L 40 40 1 1 B +X RB6/SCK/SCL 11 2000 1000 100 L 40 40 1 1 B +X RB7/TX/CK 10 2000 1100 100 L 40 40 1 1 B +X RC0/AN4/C2IN+ 16 2000 1300 100 L 40 40 1 1 B +X RC1/AN5/C12IN1- 15 2000 1400 100 L 40 40 1 1 B +X RC2/AN6/C12IN2-/P1D 14 2000 1500 100 L 40 40 1 1 B +X RC3/AN7C12IN3-/P1C 7 2000 1600 100 L 40 40 1 1 B +X RC4/C2OUT/P1B 6 2000 1700 100 L 40 40 1 1 B +X RC5/CCP1/P1A 5 2000 1800 100 L 40 40 1 1 B +X RC6/AN8/SS 8 2000 1900 100 L 40 40 1 1 B +X RC7/AN9/SDO 9 2000 2000 100 L 40 40 1 1 B +X VDD 1 -100 2000 100 R 40 40 1 1 W +X VSS 20 -100 100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F870P +# Package Name: DIL28-3 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F870P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16F870P" 100 -800 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F870SO +# Package Name: SO-28W +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F870SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16F870SO" 100 -800 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F870SS +# Package Name: SSOP28 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F870SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16F870SS" 100 -800 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F871L +# Package Name: PLCC-44 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F871L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F871L" 100 -1300 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 36 800 100 100 L 40 40 1 1 B +X MCLR#/THV 2 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 14 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 15 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 43 800 700 100 L 40 40 1 1 B +X PGD/RB7 44 800 800 100 L 40 40 1 1 B +X PGM/RB3 39 800 400 100 L 40 40 1 1 B +X PSP4/RD4 30 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 31 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 32 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 33 800 -100 100 L 40 40 1 1 B +X RA0/AN0 3 -900 700 100 R 40 40 1 1 B +X RA1/AN1 4 -900 600 100 R 40 40 1 1 B +X RA2/AN2 5 -900 500 100 R 40 40 1 1 B +X RA3/AN3 6 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 7 -900 300 100 R 40 40 1 1 B +X RA5/AN4 8 -900 200 100 R 40 40 1 1 B +X RB1 37 800 200 100 L 40 40 1 1 B +X RB2 38 800 300 100 L 40 40 1 1 B +X RB4 41 800 500 100 L 40 40 1 1 B +X RB5 42 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 16 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 18 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 19 -900 -700 100 R 40 40 1 1 B +X RC3 20 -900 -800 100 R 40 40 1 1 B +X RC4 25 800 -800 100 L 40 40 1 1 B +X RC5 26 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 21 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 22 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 23 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 24 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 9 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 10 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 11 -900 -100 100 R 40 40 1 1 B +X RX/RC7 29 800 -500 100 L 40 40 1 1 B +X TX/RC6 27 800 -600 100 L 40 40 1 1 B +X VDD 12 0 1200 100 D 40 40 1 1 W +X VDD@1 35 -100 1200 100 D 40 40 1 1 W +X VSS 13 0 -1300 100 U 40 40 1 1 W +X VSS@1 34 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F871P +# Package Name: DIL40 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F871P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F871P" 100 -1300 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 33 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 13 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 14 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 39 800 700 100 L 40 40 1 1 B +X PGD/RB7 40 800 800 100 L 40 40 1 1 B +X PGM/RB3 36 800 400 100 L 40 40 1 1 B +X PSP4/RD4 27 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 28 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 29 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 30 800 -100 100 L 40 40 1 1 B +X RA0/AN0 2 -900 700 100 R 40 40 1 1 B +X RA1/AN1 3 -900 600 100 R 40 40 1 1 B +X RA2/AN2 4 -900 500 100 R 40 40 1 1 B +X RA3/AN3 5 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 300 100 R 40 40 1 1 B +X RA5/AN4 7 -900 200 100 R 40 40 1 1 B +X RB1 34 800 200 100 L 40 40 1 1 B +X RB2 35 800 300 100 L 40 40 1 1 B +X RB4 37 800 500 100 L 40 40 1 1 B +X RB5 38 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 15 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 16 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 17 -900 -700 100 R 40 40 1 1 B +X RC3 18 -900 -800 100 R 40 40 1 1 B +X RC4 23 800 -800 100 L 40 40 1 1 B +X RC5 24 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 19 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 20 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 21 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 22 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 8 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 9 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 10 -900 -100 100 R 40 40 1 1 B +X RX/RC7 26 800 -500 100 L 40 40 1 1 B +X TX/RC6 25 800 -600 100 L 40 40 1 1 B +X VDD 11 0 1200 100 D 40 40 1 1 W +X VDD@1 32 -100 1200 100 D 40 40 1 1 W +X VSS 12 0 -1300 100 U 40 40 1 1 W +X VSS@1 31 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F871T +# Package Name: TQFP44 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F871T IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F871T" 100 -1300 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3 37 -900 -800 100 R 40 40 1 1 B +X RC4 42 800 -800 100 L 40 40 1 1 B +X RC5 43 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F872P +# Package Name: DIL28-3 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F872P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16F872P" 300 -1000 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F872SO +# Package Name: SO-28W +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F872SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16F872SO" 300 -1000 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F872SS +# Package Name: SSOP28 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F872SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16F872SS" 300 -1000 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F874L +# Package Name: PLCC-44 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F874L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F874L" 100 -1300 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 36 800 100 100 L 40 40 1 1 B +X MCLR#/THV 2 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 14 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 15 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 43 800 700 100 L 40 40 1 1 B +X PGD/RB7 44 800 800 100 L 40 40 1 1 B +X PGM/RB3 39 800 400 100 L 40 40 1 1 B +X PSP4/RD4 30 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 31 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 32 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 33 800 -100 100 L 40 40 1 1 B +X RA0/AN0 3 -900 700 100 R 40 40 1 1 B +X RA1/AN1 4 -900 600 100 R 40 40 1 1 B +X RA2/AN2 5 -900 500 100 R 40 40 1 1 B +X RA3/AN3 6 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 7 -900 300 100 R 40 40 1 1 B +X RA5/AN4 8 -900 200 100 R 40 40 1 1 B +X RB1 37 800 200 100 L 40 40 1 1 B +X RB2 38 800 300 100 L 40 40 1 1 B +X RB4 41 800 500 100 L 40 40 1 1 B +X RB5 42 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 16 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 18 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 19 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 20 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 21 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 22 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 23 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 24 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 9 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 10 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 11 -900 -100 100 R 40 40 1 1 B +X RX/RC7 29 800 -500 100 L 40 40 1 1 B +X SDI/RC4 25 800 -800 100 L 40 40 1 1 B +X SDO/RC5 26 800 -700 100 L 40 40 1 1 B +X TX/RC6 27 800 -600 100 L 40 40 1 1 B +X VDD 12 0 1200 100 D 40 40 1 1 W +X VDD@1 35 -100 1200 100 D 40 40 1 1 W +X VSS 13 0 -1300 100 U 40 40 1 1 W +X VSS@1 34 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F874P +# Package Name: DIL40 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F874P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F874P" 100 -1300 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 33 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 13 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 14 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 39 800 700 100 L 40 40 1 1 B +X PGD/RB7 40 800 800 100 L 40 40 1 1 B +X PGM/RB3 36 800 400 100 L 40 40 1 1 B +X PSP4/RD4 27 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 28 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 29 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 30 800 -100 100 L 40 40 1 1 B +X RA0/AN0 2 -900 700 100 R 40 40 1 1 B +X RA1/AN1 3 -900 600 100 R 40 40 1 1 B +X RA2/AN2 4 -900 500 100 R 40 40 1 1 B +X RA3/AN3 5 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 300 100 R 40 40 1 1 B +X RA5/AN4 7 -900 200 100 R 40 40 1 1 B +X RB1 34 800 200 100 L 40 40 1 1 B +X RB2 35 800 300 100 L 40 40 1 1 B +X RB4 37 800 500 100 L 40 40 1 1 B +X RB5 38 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 15 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 16 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 17 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 18 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 19 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 20 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 21 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 22 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 8 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 9 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 10 -900 -100 100 R 40 40 1 1 B +X RX/RC7 26 800 -500 100 L 40 40 1 1 B +X SDI/RC4 23 800 -800 100 L 40 40 1 1 B +X SDO/RC5 24 800 -700 100 L 40 40 1 1 B +X TX/RC6 25 800 -600 100 L 40 40 1 1 B +X VDD 11 0 1200 100 D 40 40 1 1 W +X VDD@1 32 -100 1200 100 D 40 40 1 1 W +X VSS 12 0 -1300 100 U 40 40 1 1 W +X VSS@1 31 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F874PQ +# Package Name: MQFP44-2 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F874PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F874PQ" 100 -1300 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 37 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X SDI/RC4 42 800 -800 100 L 40 40 1 1 B +X SDO/RC5 43 800 -700 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F874PT +# Package Name: TQFP44 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F874PT IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F874PT" 100 -1300 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 37 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X SDI/RC4 42 800 -800 100 L 40 40 1 1 B +X SDO/RC5 43 800 -700 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F876P +# Package Name: DIL28-6 +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F876P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16F876P" 300 -1000 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F876SO +# Package Name: SO-28W +# Dev Tech: F +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F876SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16F876SO" 300 -1000 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F877L +# Package Name: PLCC-44 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F877L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F877L" 100 -1300 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 36 800 100 100 L 40 40 1 1 B +X MCLR#/THV 2 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 14 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 15 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 43 800 700 100 L 40 40 1 1 B +X PGD/RB7 44 800 800 100 L 40 40 1 1 B +X PGM/RB3 39 800 400 100 L 40 40 1 1 B +X PSP4/RD4 30 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 31 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 32 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 33 800 -100 100 L 40 40 1 1 B +X RA0/AN0 3 -900 700 100 R 40 40 1 1 B +X RA1/AN1 4 -900 600 100 R 40 40 1 1 B +X RA2/AN2 5 -900 500 100 R 40 40 1 1 B +X RA3/AN3 6 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 7 -900 300 100 R 40 40 1 1 B +X RA5/AN4 8 -900 200 100 R 40 40 1 1 B +X RB1 37 800 200 100 L 40 40 1 1 B +X RB2 38 800 300 100 L 40 40 1 1 B +X RB4 41 800 500 100 L 40 40 1 1 B +X RB5 42 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 16 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 18 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 19 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 20 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 21 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 22 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 23 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 24 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 9 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 10 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 11 -900 -100 100 R 40 40 1 1 B +X RX/RC7 29 800 -500 100 L 40 40 1 1 B +X SDI/RC4 25 800 -800 100 L 40 40 1 1 B +X SDO/RC5 26 800 -700 100 L 40 40 1 1 B +X TX/RC6 27 800 -600 100 L 40 40 1 1 B +X VDD 12 0 1200 100 D 40 40 1 1 W +X VDD@1 35 -100 1200 100 D 40 40 1 1 W +X VSS 13 0 -1300 100 U 40 40 1 1 W +X VSS@1 34 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F877P +# Package Name: DIL40 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F877P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F877P" 100 -1300 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 33 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 13 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 14 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 39 800 700 100 L 40 40 1 1 B +X PGD/RB7 40 800 800 100 L 40 40 1 1 B +X PGM/RB3 36 800 400 100 L 40 40 1 1 B +X PSP4/RD4 27 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 28 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 29 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 30 800 -100 100 L 40 40 1 1 B +X RA0/AN0 2 -900 700 100 R 40 40 1 1 B +X RA1/AN1 3 -900 600 100 R 40 40 1 1 B +X RA2/AN2 4 -900 500 100 R 40 40 1 1 B +X RA3/AN3 5 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 300 100 R 40 40 1 1 B +X RA5/AN4 7 -900 200 100 R 40 40 1 1 B +X RB1 34 800 200 100 L 40 40 1 1 B +X RB2 35 800 300 100 L 40 40 1 1 B +X RB4 37 800 500 100 L 40 40 1 1 B +X RB5 38 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 15 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 16 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 17 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 18 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 19 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 20 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 21 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 22 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 8 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 9 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 10 -900 -100 100 R 40 40 1 1 B +X RX/RC7 26 800 -500 100 L 40 40 1 1 B +X SDI/RC4 23 800 -800 100 L 40 40 1 1 B +X SDO/RC5 24 800 -700 100 L 40 40 1 1 B +X TX/RC6 25 800 -600 100 L 40 40 1 1 B +X VDD 11 0 1200 100 D 40 40 1 1 W +X VDD@1 32 -100 1200 100 D 40 40 1 1 W +X VSS 12 0 -1300 100 U 40 40 1 1 W +X VSS@1 31 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F877PQ +# Package Name: MQFP44-2 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F877PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F877PQ" 100 -1300 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 37 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X SDI/RC4 42 800 -800 100 L 40 40 1 1 B +X SDO/RC5 43 800 -700 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F877PT +# Package Name: TQFP44 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F877PT IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F877PT" 100 -1300 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 37 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X SDI/RC4 42 800 -800 100 L 40 40 1 1 B +X SDO/RC5 43 800 -700 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16F877SO +# Package Name: S44 +# Dev Tech: 7 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16F877SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC17F874 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16F877SO" 100 -1300 50 H V L B +F2 "microchip-5-S44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 36 800 100 100 L 40 40 1 1 B +X MCLR#/THV 2 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 14 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 15 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 43 800 700 100 L 40 40 1 1 B +X PGD/RB7 44 800 800 100 L 40 40 1 1 B +X PGM/RB3 39 800 400 100 L 40 40 1 1 B +X PSP4/RD4 30 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 31 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 32 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 33 800 -100 100 L 40 40 1 1 B +X RA0/AN0 3 -900 700 100 R 40 40 1 1 B +X RA1/AN1 4 -900 600 100 R 40 40 1 1 B +X RA2/AN2 5 -900 500 100 R 40 40 1 1 B +X RA3/AN3 6 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 7 -900 300 100 R 40 40 1 1 B +X RA5/AN4 8 -900 200 100 R 40 40 1 1 B +X RB1 37 800 200 100 L 40 40 1 1 B +X RB2 38 800 300 100 L 40 40 1 1 B +X RB4 41 800 500 100 L 40 40 1 1 B +X RB5 42 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 16 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 18 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 19 -900 -700 100 R 40 40 1 1 B +X RC3/SCK 20 -900 -800 100 R 40 40 1 1 B +X RD0/PSP0 21 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 22 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 23 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 24 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 9 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 10 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 11 -900 -100 100 R 40 40 1 1 B +X RX/RC7 29 800 -500 100 L 40 40 1 1 B +X SDI/RC4 25 800 -800 100 L 40 40 1 1 B +X SDO/RC5 26 800 -700 100 L 40 40 1 1 B +X TX/RC6 27 800 -600 100 L 40 40 1 1 B +X VDD 12 0 1200 100 D 40 40 1 1 W +X VDD@1 35 -100 1200 100 D 40 40 1 1 W +X VSS 13 0 -1300 100 U 40 40 1 1 W +X VSS@1 34 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF870P +# Package Name: DIL28-3 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF870P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16LF870P" 100 -800 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF870SO +# Package Name: SO-28W +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF870SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16LF870SO" 100 -800 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF870SS +# Package Name: SSOP28 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF870SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F870 +F0 "IC" -800 1050 50 H V L B +F1 "PIC16LF870SS" 100 -800 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1000 700 1000 +P 2 1 0 0 700 1000 700 -700 +P 2 1 0 0 700 -700 -800 -700 +P 2 1 0 0 -800 -700 -800 1000 +T 0 -60 930 60 0 1 0 VDD +T 0 -60 -620 60 0 1 0 VSS +X INT/RB0 21 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 800 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -900 -100 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -900 -200 100 R 40 40 1 1 O +X PGC/RB6 27 800 700 100 L 40 40 1 1 B +X PGD/RB7 28 800 800 100 L 40 40 1 1 B +X PGM/RB3 24 800 400 100 L 40 40 1 1 B +X RA0/AN0 2 -900 600 100 R 40 40 1 1 B +X RA1/AN1 3 -900 500 100 R 40 40 1 1 B +X RA2/AN2 4 -900 400 100 R 40 40 1 1 B +X RA3/AN3 5 -900 300 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 200 100 R 40 40 1 1 B +X RA5/AN4 7 -900 100 100 R 40 40 1 1 B +X RB1 22 800 200 100 L 40 40 1 1 B +X RB2 23 800 300 100 L 40 40 1 1 B +X RB4 25 800 500 100 L 40 40 1 1 B +X RB5 26 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 11 -900 -300 100 R 40 40 1 1 B +X RC1/T1OSI 12 -900 -400 100 R 40 40 1 1 B +X RC2/CCP1 13 -900 -500 100 R 40 40 1 1 B +X RC3 14 -900 -600 100 R 40 40 1 1 B +X RC4 15 800 -500 100 L 40 40 1 1 B +X RC5 16 800 -400 100 L 40 40 1 1 B +X RX/RC7 18 800 -200 100 L 40 40 1 1 B +X TX/RC6 17 800 -300 100 L 40 40 1 1 B +X VDD 20 -100 1100 100 D 40 40 1 1 W +X VSS 8 0 -800 100 U 40 40 1 1 W +X VSS@1 19 -100 -800 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF871L +# Package Name: PLCC-44 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF871L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16LF871L" 100 -1300 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 36 800 100 100 L 40 40 1 1 B +X MCLR#/THV 2 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 14 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 15 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 43 800 700 100 L 40 40 1 1 B +X PGD/RB7 44 800 800 100 L 40 40 1 1 B +X PGM/RB3 39 800 400 100 L 40 40 1 1 B +X PSP4/RD4 30 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 31 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 32 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 33 800 -100 100 L 40 40 1 1 B +X RA0/AN0 3 -900 700 100 R 40 40 1 1 B +X RA1/AN1 4 -900 600 100 R 40 40 1 1 B +X RA2/AN2 5 -900 500 100 R 40 40 1 1 B +X RA3/AN3 6 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 7 -900 300 100 R 40 40 1 1 B +X RA5/AN4 8 -900 200 100 R 40 40 1 1 B +X RB1 37 800 200 100 L 40 40 1 1 B +X RB2 38 800 300 100 L 40 40 1 1 B +X RB4 41 800 500 100 L 40 40 1 1 B +X RB5 42 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 16 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 18 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 19 -900 -700 100 R 40 40 1 1 B +X RC3 20 -900 -800 100 R 40 40 1 1 B +X RC4 25 800 -800 100 L 40 40 1 1 B +X RC5 26 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 21 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 22 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 23 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 24 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 9 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 10 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 11 -900 -100 100 R 40 40 1 1 B +X RX/RC7 29 800 -500 100 L 40 40 1 1 B +X TX/RC6 27 800 -600 100 L 40 40 1 1 B +X VDD 12 0 1200 100 D 40 40 1 1 W +X VDD@1 35 -100 1200 100 D 40 40 1 1 W +X VSS 13 0 -1300 100 U 40 40 1 1 W +X VSS@1 34 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF871P +# Package Name: DIL40 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF871P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16LF871P" 100 -1300 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 33 800 100 100 L 40 40 1 1 B +X MCLR#/THV 1 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 13 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 14 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 39 800 700 100 L 40 40 1 1 B +X PGD/RB7 40 800 800 100 L 40 40 1 1 B +X PGM/RB3 36 800 400 100 L 40 40 1 1 B +X PSP4/RD4 27 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 28 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 29 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 30 800 -100 100 L 40 40 1 1 B +X RA0/AN0 2 -900 700 100 R 40 40 1 1 B +X RA1/AN1 3 -900 600 100 R 40 40 1 1 B +X RA2/AN2 4 -900 500 100 R 40 40 1 1 B +X RA3/AN3 5 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 6 -900 300 100 R 40 40 1 1 B +X RA5/AN4 7 -900 200 100 R 40 40 1 1 B +X RB1 34 800 200 100 L 40 40 1 1 B +X RB2 35 800 300 100 L 40 40 1 1 B +X RB4 37 800 500 100 L 40 40 1 1 B +X RB5 38 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 15 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 16 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 17 -900 -700 100 R 40 40 1 1 B +X RC3 18 -900 -800 100 R 40 40 1 1 B +X RC4 23 800 -800 100 L 40 40 1 1 B +X RC5 24 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 19 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 20 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 21 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 22 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 8 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 9 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 10 -900 -100 100 R 40 40 1 1 B +X RX/RC7 26 800 -500 100 L 40 40 1 1 B +X TX/RC6 25 800 -600 100 L 40 40 1 1 B +X VDD 11 0 1200 100 D 40 40 1 1 W +X VDD@1 32 -100 1200 100 D 40 40 1 1 W +X VSS 12 0 -1300 100 U 40 40 1 1 W +X VSS@1 31 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF871T +# Package Name: TQFP44 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF871T IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F871 +F0 "IC" -800 1150 50 H V L B +F1 "PIC16LF871T" 100 -1300 50 H V L B +F2 "microchip-5-TQFP44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -800 1100 700 1100 +P 2 1 0 0 700 1100 700 -1200 +P 2 1 0 0 700 -1200 -800 -1200 +P 2 1 0 0 -800 -1200 -800 1100 +T 0 -60 1030 60 0 1 0 VDD +T 0 -60 -1120 60 0 1 0 VSS +X INT/RB0 8 800 100 100 L 40 40 1 1 B +X MCLR#/THV 18 -900 900 100 R 40 40 1 1 I +X OSC1/CLKIN 30 -900 -300 100 R 40 40 1 1 I +X OSC2/CLKOUT 31 -900 -400 100 R 40 40 1 1 O +X PGC/RB6 16 800 700 100 L 40 40 1 1 B +X PGD/RB7 17 800 800 100 L 40 40 1 1 B +X PGM/RB3 11 800 400 100 L 40 40 1 1 B +X PSP4/RD4 2 800 -400 100 L 40 40 1 1 B +X PSP5/RD5 3 800 -300 100 L 40 40 1 1 B +X PSP6/RD6 4 800 -200 100 L 40 40 1 1 B +X PSP7/RD7 5 800 -100 100 L 40 40 1 1 B +X RA0/AN0 19 -900 700 100 R 40 40 1 1 B +X RA1/AN1 20 -900 600 100 R 40 40 1 1 B +X RA2/AN2 21 -900 500 100 R 40 40 1 1 B +X RA3/AN3 22 -900 400 100 R 40 40 1 1 B +X RA4/T0CKI 23 -900 300 100 R 40 40 1 1 B +X RA5/AN4 24 -900 200 100 R 40 40 1 1 B +X RB1 9 800 200 100 L 40 40 1 1 B +X RB2 10 800 300 100 L 40 40 1 1 B +X RB4 14 800 500 100 L 40 40 1 1 B +X RB5 15 800 600 100 L 40 40 1 1 B +X RC0/T1OSO 32 -900 -500 100 R 40 40 1 1 B +X RC1/T1OSI 35 -900 -600 100 R 40 40 1 1 B +X RC2/CCP1 36 -900 -700 100 R 40 40 1 1 B +X RC3 37 -900 -800 100 R 40 40 1 1 B +X RC4 42 800 -800 100 L 40 40 1 1 B +X RC5 43 800 -700 100 L 40 40 1 1 B +X RD0/PSP0 38 -900 -900 100 R 40 40 1 1 B +X RD1/PSP1 39 -900 -1000 100 R 40 40 1 1 B +X RD2/PSP2 40 800 -1000 100 L 40 40 1 1 B +X RD3/PSP3 41 800 -900 100 L 40 40 1 1 B +X RE0/RD#/AN5 25 -900 100 100 R 40 40 1 1 B +X RE1/WR#/AN6 26 -900 0 100 R 40 40 1 1 B +X RE2/CS#/AN7 27 -900 -100 100 R 40 40 1 1 B +X RX/RC7 1 800 -500 100 L 40 40 1 1 B +X TX/RC6 44 800 -600 100 L 40 40 1 1 B +X VDD 7 0 1200 100 D 40 40 1 1 W +X VDD@1 28 -100 1200 100 D 40 40 1 1 W +X VSS 6 0 -1300 100 U 40 40 1 1 W +X VSS@1 29 -100 -1300 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF872P +# Package Name: DIL28-3 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF872P IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16LF872P" 300 -1000 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF872SO +# Package Name: SO-28W +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF872SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16LF872SO" 300 -1000 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC16LF872SS +# Package Name: SSOP28 +# Dev Tech: LF +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC16LF872SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: PIC16F872 +F0 "IC" -700 950 50 H V L B +F1 "PIC16LF872SS" 300 -1000 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -700 900 800 900 +P 2 1 0 0 800 900 800 -900 +P 2 1 0 0 800 -900 -700 -900 +P 2 1 0 0 -700 -900 -700 900 +T 0 40 830 60 0 1 0 VDD +T 0 40 -820 60 0 1 0 VSS +X INT/RB0 21 900 -100 100 L 40 40 1 1 B +X MCLR#/THV 1 -800 700 100 R 40 40 1 1 I +X OSC1/CLKIN 9 -800 -200 100 R 40 40 1 1 I +X OSC2/CLKOUT 10 -800 -300 100 R 40 40 1 1 O +X PGC/RB6 27 900 500 100 L 40 40 1 1 B +X PGD/RB7 28 900 600 100 L 40 40 1 1 B +X PGM/RB3 24 900 200 100 L 40 40 1 1 B +X RA0/AN0 2 -800 500 100 R 40 40 1 1 B +X RA1/AN1 3 -800 400 100 R 40 40 1 1 B +X RA2/AN2 4 -800 300 100 R 40 40 1 1 B +X RA3/AN3 5 -800 200 100 R 40 40 1 1 B +X RA4/T0CKI 6 -800 100 100 R 40 40 1 1 B +X RA5/AN4 7 -800 0 100 R 40 40 1 1 B +X RB1 22 900 0 100 L 40 40 1 1 B +X RB2 23 900 100 100 L 40 40 1 1 B +X RB4 25 900 300 100 L 40 40 1 1 B +X RB5 26 900 400 100 L 40 40 1 1 B +X RC0/T1OSO 11 -800 -500 100 R 40 40 1 1 B +X RC1/T1OSI 12 -800 -600 100 R 40 40 1 1 B +X RC2/CCP1 13 -800 -700 100 R 40 40 1 1 B +X RC3/SCK 14 -800 -800 100 R 40 40 1 1 B +X RC6 17 900 -400 100 L 40 40 1 1 B +X RC7 18 900 -300 100 L 40 40 1 1 B +X SDI/RC4 15 900 -600 100 L 40 40 1 1 B +X SDO/RC5 16 900 -500 100 L 40 40 1 1 B +X VDD 20 0 1000 100 D 40 40 1 1 W +X VSS 8 100 -1000 100 U 40 40 1 1 W +X VSS@1 19 0 -1000 100 U 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C42L +# Package Name: PLCC-44 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C42L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C42L" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 35 -500 300 100 R 40 40 1 1 I +X NC 2 -400 -1200 0 R 40 40 1 1 U +X OSC1 21 -500 700 100 R 40 40 1 1 I +X OSC2 22 -500 500 100 R 40 40 1 1 O +X RA0 28 500 -2000 100 L 40 40 1 1 B +X RA1 27 500 -1900 100 L 40 40 1 1 B +X RA2 26 500 -1800 100 L 40 40 1 1 B +X RA3 25 500 -1700 100 L 40 40 1 1 B +X RA4 24 500 -1600 100 L 40 40 1 1 B +X RA5 23 500 -1500 100 L 40 40 1 1 B +X RB0 13 500 -1300 100 L 40 40 1 1 B +X RB1 14 500 -1200 100 L 40 40 1 1 B +X RB2 15 500 -1100 100 L 40 40 1 1 B +X RB3 16 500 -1000 100 L 40 40 1 1 B +X RB4 17 500 -900 100 L 40 40 1 1 B +X RB5 18 500 -800 100 L 40 40 1 1 B +X RB6 19 500 -700 100 L 40 40 1 1 B +X RB7 20 500 -600 100 L 40 40 1 1 B +X RC0 3 500 -400 100 L 40 40 1 1 B +X RC1 4 500 -300 100 L 40 40 1 1 B +X RC2 5 500 -200 100 L 40 40 1 1 B +X RC3 6 500 -100 100 L 40 40 1 1 B +X RC4 7 500 0 100 L 40 40 1 1 B +X RC5 8 500 100 100 L 40 40 1 1 B +X RC6 9 500 200 100 L 40 40 1 1 B +X RC7 10 500 300 100 L 40 40 1 1 B +X RD0 43 500 500 100 L 40 40 1 1 B +X RD1 42 500 600 100 L 40 40 1 1 B +X RD2 41 500 700 100 L 40 40 1 1 B +X RD3 40 500 800 100 L 40 40 1 1 B +X RD4 39 500 900 100 L 40 40 1 1 B +X RD5 38 500 1000 100 L 40 40 1 1 B +X RD6 37 500 1100 100 L 40 40 1 1 B +X RD7 36 500 1200 100 L 40 40 1 1 B +X RE0 32 500 1400 100 L 40 40 1 1 B +X RE1 31 500 1500 100 L 40 40 1 1 B +X RE2 30 500 1600 100 L 40 40 1 1 B +X TEST 29 -500 100 100 R 40 40 1 1 I +X VDD 1 -500 1600 100 R 40 40 1 1 W +X VDD@1 44 -500 1500 100 R 40 40 1 1 W +X VSS 11 -500 -1700 100 R 40 40 1 1 W +X VSS@1 12 -500 -1800 100 R 40 40 1 1 W +X VSS@2 33 -500 -1900 100 R 40 40 1 1 W +X VSS@3 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C42P-40 +# Package Name: DIL40 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C42P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1 +F0 "IC" -400 1950 50 H V L B +F1 "PIC17C42P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 32 -500 900 100 R 40 40 1 1 I +X OSC1 19 -500 1300 100 R 40 40 1 1 I +X OSC2 20 -500 1100 100 R 40 40 1 1 O +X RA0 26 500 -1800 100 L 40 40 1 1 B +X RA1 25 500 -1700 100 L 40 40 1 1 B +X RA2 24 500 -1600 100 L 40 40 1 1 B +X RA3 23 500 -1500 100 L 40 40 1 1 B +X RA4 22 500 -1400 100 L 40 40 1 1 B +X RA5 21 500 -1300 100 L 40 40 1 1 B +X RB0 11 500 -1100 100 L 40 40 1 1 B +X RB1 12 500 -1000 100 L 40 40 1 1 B +X RB2 13 500 -900 100 L 40 40 1 1 B +X RB3 14 500 -800 100 L 40 40 1 1 B +X RB4 15 500 -700 100 L 40 40 1 1 B +X RB5 16 500 -600 100 L 40 40 1 1 B +X RB6 17 500 -500 100 L 40 40 1 1 B +X RB7 18 500 -400 100 L 40 40 1 1 B +X RC0 2 500 -200 100 L 40 40 1 1 O +X RC1 3 500 -100 100 L 40 40 1 1 O +X RC2 4 500 0 100 L 40 40 1 1 O +X RC3 5 500 100 100 L 40 40 1 1 O +X RC4 6 500 200 100 L 40 40 1 1 O +X RC5 7 500 300 100 L 40 40 1 1 O +X RC6 8 500 400 100 L 40 40 1 1 O +X RC7 9 500 500 100 L 40 40 1 1 O +X RD0 40 500 700 100 L 40 40 1 1 B +X RD1 39 500 800 100 L 40 40 1 1 B +X RD2 38 500 900 100 L 40 40 1 1 B +X RD3 37 500 1000 100 L 40 40 1 1 B +X RD4 36 500 1100 100 L 40 40 1 1 B +X RD5 35 500 1200 100 L 40 40 1 1 B +X RD6 34 500 1300 100 L 40 40 1 1 B +X RD7 33 500 1400 100 L 40 40 1 1 B +X RE0 30 500 1600 100 L 40 40 1 1 B +X RE1 29 500 1700 100 L 40 40 1 1 B +X RE2 28 500 1800 100 L 40 40 1 1 B +X TEST 27 -500 600 100 R 40 40 1 1 I +X VDD 1 -500 1800 100 R 40 40 1 1 W +X VSS 10 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C42PQ +# Package Name: MQFP44-2 +# Dev Tech: 2 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C42PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C42PQ" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 7 -500 300 100 R 40 40 1 1 I +X NC 18 -400 -1200 0 R 40 40 1 1 U +X OSC1 37 -500 700 100 R 40 40 1 1 I +X OSC2 38 -500 500 100 R 40 40 1 1 O +X RA0 44 500 -2000 100 L 40 40 1 1 B +X RA1 43 500 -1900 100 L 40 40 1 1 B +X RA2 42 500 -1800 100 L 40 40 1 1 B +X RA3 41 500 -1700 100 L 40 40 1 1 B +X RA4 40 500 -1600 100 L 40 40 1 1 B +X RA5 39 500 -1500 100 L 40 40 1 1 B +X RB0 29 500 -1300 100 L 40 40 1 1 B +X RB1 30 500 -1200 100 L 40 40 1 1 B +X RB2 31 500 -1100 100 L 40 40 1 1 B +X RB3 32 500 -1000 100 L 40 40 1 1 B +X RB4 33 500 -900 100 L 40 40 1 1 B +X RB5 34 500 -800 100 L 40 40 1 1 B +X RB6 35 500 -700 100 L 40 40 1 1 B +X RB7 36 500 -600 100 L 40 40 1 1 B +X RC0 19 500 -400 100 L 40 40 1 1 B +X RC1 20 500 -300 100 L 40 40 1 1 B +X RC2 21 500 -200 100 L 40 40 1 1 B +X RC3 22 500 -100 100 L 40 40 1 1 B +X RC4 23 500 0 100 L 40 40 1 1 B +X RC5 24 500 100 100 L 40 40 1 1 B +X RC6 25 500 200 100 L 40 40 1 1 B +X RC7 26 500 300 100 L 40 40 1 1 B +X RD0 15 500 500 100 L 40 40 1 1 B +X RD1 14 500 600 100 L 40 40 1 1 B +X RD2 13 500 700 100 L 40 40 1 1 B +X RD3 12 500 800 100 L 40 40 1 1 B +X RD4 11 500 900 100 L 40 40 1 1 B +X RD5 10 500 1000 100 L 40 40 1 1 B +X RD6 9 500 1100 100 L 40 40 1 1 B +X RD7 8 500 1200 100 L 40 40 1 1 B +X RE0 4 500 1400 100 L 40 40 1 1 B +X RE1 3 500 1500 100 L 40 40 1 1 B +X RE2 2 500 1600 100 L 40 40 1 1 B +X TEST 1 -500 100 100 R 40 40 1 1 I +X VDD 16 -500 1600 100 R 40 40 1 1 W +X VDD@1 17 -500 1500 100 R 40 40 1 1 W +X VSS 5 -500 -1700 100 R 40 40 1 1 W +X VSS@1 6 -500 -1800 100 R 40 40 1 1 W +X VSS@2 27 -500 -1900 100 R 40 40 1 1 W +X VSS@3 28 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C43L +# Package Name: PLCC-44 +# Dev Tech: 3 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C43L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C43L" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 35 -500 300 100 R 40 40 1 1 I +X NC 2 -400 -1200 0 R 40 40 1 1 U +X OSC1 21 -500 700 100 R 40 40 1 1 I +X OSC2 22 -500 500 100 R 40 40 1 1 O +X RA0 28 500 -2000 100 L 40 40 1 1 B +X RA1 27 500 -1900 100 L 40 40 1 1 B +X RA2 26 500 -1800 100 L 40 40 1 1 B +X RA3 25 500 -1700 100 L 40 40 1 1 B +X RA4 24 500 -1600 100 L 40 40 1 1 B +X RA5 23 500 -1500 100 L 40 40 1 1 B +X RB0 13 500 -1300 100 L 40 40 1 1 B +X RB1 14 500 -1200 100 L 40 40 1 1 B +X RB2 15 500 -1100 100 L 40 40 1 1 B +X RB3 16 500 -1000 100 L 40 40 1 1 B +X RB4 17 500 -900 100 L 40 40 1 1 B +X RB5 18 500 -800 100 L 40 40 1 1 B +X RB6 19 500 -700 100 L 40 40 1 1 B +X RB7 20 500 -600 100 L 40 40 1 1 B +X RC0 3 500 -400 100 L 40 40 1 1 B +X RC1 4 500 -300 100 L 40 40 1 1 B +X RC2 5 500 -200 100 L 40 40 1 1 B +X RC3 6 500 -100 100 L 40 40 1 1 B +X RC4 7 500 0 100 L 40 40 1 1 B +X RC5 8 500 100 100 L 40 40 1 1 B +X RC6 9 500 200 100 L 40 40 1 1 B +X RC7 10 500 300 100 L 40 40 1 1 B +X RD0 43 500 500 100 L 40 40 1 1 B +X RD1 42 500 600 100 L 40 40 1 1 B +X RD2 41 500 700 100 L 40 40 1 1 B +X RD3 40 500 800 100 L 40 40 1 1 B +X RD4 39 500 900 100 L 40 40 1 1 B +X RD5 38 500 1000 100 L 40 40 1 1 B +X RD6 37 500 1100 100 L 40 40 1 1 B +X RD7 36 500 1200 100 L 40 40 1 1 B +X RE0 32 500 1400 100 L 40 40 1 1 B +X RE1 31 500 1500 100 L 40 40 1 1 B +X RE2 30 500 1600 100 L 40 40 1 1 B +X TEST 29 -500 100 100 R 40 40 1 1 I +X VDD 1 -500 1600 100 R 40 40 1 1 W +X VDD@1 44 -500 1500 100 R 40 40 1 1 W +X VSS 11 -500 -1700 100 R 40 40 1 1 W +X VSS@1 12 -500 -1800 100 R 40 40 1 1 W +X VSS@2 33 -500 -1900 100 R 40 40 1 1 W +X VSS@3 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C43P-40 +# Package Name: DIL40 +# Dev Tech: 3 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C43P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1 +F0 "IC" -400 1950 50 H V L B +F1 "PIC17C43P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 32 -500 900 100 R 40 40 1 1 I +X OSC1 19 -500 1300 100 R 40 40 1 1 I +X OSC2 20 -500 1100 100 R 40 40 1 1 O +X RA0 26 500 -1800 100 L 40 40 1 1 B +X RA1 25 500 -1700 100 L 40 40 1 1 B +X RA2 24 500 -1600 100 L 40 40 1 1 B +X RA3 23 500 -1500 100 L 40 40 1 1 B +X RA4 22 500 -1400 100 L 40 40 1 1 B +X RA5 21 500 -1300 100 L 40 40 1 1 B +X RB0 11 500 -1100 100 L 40 40 1 1 B +X RB1 12 500 -1000 100 L 40 40 1 1 B +X RB2 13 500 -900 100 L 40 40 1 1 B +X RB3 14 500 -800 100 L 40 40 1 1 B +X RB4 15 500 -700 100 L 40 40 1 1 B +X RB5 16 500 -600 100 L 40 40 1 1 B +X RB6 17 500 -500 100 L 40 40 1 1 B +X RB7 18 500 -400 100 L 40 40 1 1 B +X RC0 2 500 -200 100 L 40 40 1 1 O +X RC1 3 500 -100 100 L 40 40 1 1 O +X RC2 4 500 0 100 L 40 40 1 1 O +X RC3 5 500 100 100 L 40 40 1 1 O +X RC4 6 500 200 100 L 40 40 1 1 O +X RC5 7 500 300 100 L 40 40 1 1 O +X RC6 8 500 400 100 L 40 40 1 1 O +X RC7 9 500 500 100 L 40 40 1 1 O +X RD0 40 500 700 100 L 40 40 1 1 B +X RD1 39 500 800 100 L 40 40 1 1 B +X RD2 38 500 900 100 L 40 40 1 1 B +X RD3 37 500 1000 100 L 40 40 1 1 B +X RD4 36 500 1100 100 L 40 40 1 1 B +X RD5 35 500 1200 100 L 40 40 1 1 B +X RD6 34 500 1300 100 L 40 40 1 1 B +X RD7 33 500 1400 100 L 40 40 1 1 B +X RE0 30 500 1600 100 L 40 40 1 1 B +X RE1 29 500 1700 100 L 40 40 1 1 B +X RE2 28 500 1800 100 L 40 40 1 1 B +X TEST 27 -500 600 100 R 40 40 1 1 I +X VDD 1 -500 1800 100 R 40 40 1 1 W +X VSS 10 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C43PQ +# Package Name: MQFP44-2 +# Dev Tech: 3 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C43PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C43PQ" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 7 -500 300 100 R 40 40 1 1 I +X NC 18 -400 -1200 0 R 40 40 1 1 U +X OSC1 37 -500 700 100 R 40 40 1 1 I +X OSC2 38 -500 500 100 R 40 40 1 1 O +X RA0 44 500 -2000 100 L 40 40 1 1 B +X RA1 43 500 -1900 100 L 40 40 1 1 B +X RA2 42 500 -1800 100 L 40 40 1 1 B +X RA3 41 500 -1700 100 L 40 40 1 1 B +X RA4 40 500 -1600 100 L 40 40 1 1 B +X RA5 39 500 -1500 100 L 40 40 1 1 B +X RB0 29 500 -1300 100 L 40 40 1 1 B +X RB1 30 500 -1200 100 L 40 40 1 1 B +X RB2 31 500 -1100 100 L 40 40 1 1 B +X RB3 32 500 -1000 100 L 40 40 1 1 B +X RB4 33 500 -900 100 L 40 40 1 1 B +X RB5 34 500 -800 100 L 40 40 1 1 B +X RB6 35 500 -700 100 L 40 40 1 1 B +X RB7 36 500 -600 100 L 40 40 1 1 B +X RC0 19 500 -400 100 L 40 40 1 1 B +X RC1 20 500 -300 100 L 40 40 1 1 B +X RC2 21 500 -200 100 L 40 40 1 1 B +X RC3 22 500 -100 100 L 40 40 1 1 B +X RC4 23 500 0 100 L 40 40 1 1 B +X RC5 24 500 100 100 L 40 40 1 1 B +X RC6 25 500 200 100 L 40 40 1 1 B +X RC7 26 500 300 100 L 40 40 1 1 B +X RD0 15 500 500 100 L 40 40 1 1 B +X RD1 14 500 600 100 L 40 40 1 1 B +X RD2 13 500 700 100 L 40 40 1 1 B +X RD3 12 500 800 100 L 40 40 1 1 B +X RD4 11 500 900 100 L 40 40 1 1 B +X RD5 10 500 1000 100 L 40 40 1 1 B +X RD6 9 500 1100 100 L 40 40 1 1 B +X RD7 8 500 1200 100 L 40 40 1 1 B +X RE0 4 500 1400 100 L 40 40 1 1 B +X RE1 3 500 1500 100 L 40 40 1 1 B +X RE2 2 500 1600 100 L 40 40 1 1 B +X TEST 1 -500 100 100 R 40 40 1 1 I +X VDD 16 -500 1600 100 R 40 40 1 1 W +X VDD@1 17 -500 1500 100 R 40 40 1 1 W +X VSS 5 -500 -1700 100 R 40 40 1 1 W +X VSS@1 6 -500 -1800 100 R 40 40 1 1 W +X VSS@2 27 -500 -1900 100 R 40 40 1 1 W +X VSS@3 28 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C44L +# Package Name: PLCC-44 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C44L IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C44L" -400 -2200 50 H V L B +F2 "microchip-5-PLCC-44" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 35 -500 300 100 R 40 40 1 1 I +X NC 2 -400 -1200 0 R 40 40 1 1 U +X OSC1 21 -500 700 100 R 40 40 1 1 I +X OSC2 22 -500 500 100 R 40 40 1 1 O +X RA0 28 500 -2000 100 L 40 40 1 1 B +X RA1 27 500 -1900 100 L 40 40 1 1 B +X RA2 26 500 -1800 100 L 40 40 1 1 B +X RA3 25 500 -1700 100 L 40 40 1 1 B +X RA4 24 500 -1600 100 L 40 40 1 1 B +X RA5 23 500 -1500 100 L 40 40 1 1 B +X RB0 13 500 -1300 100 L 40 40 1 1 B +X RB1 14 500 -1200 100 L 40 40 1 1 B +X RB2 15 500 -1100 100 L 40 40 1 1 B +X RB3 16 500 -1000 100 L 40 40 1 1 B +X RB4 17 500 -900 100 L 40 40 1 1 B +X RB5 18 500 -800 100 L 40 40 1 1 B +X RB6 19 500 -700 100 L 40 40 1 1 B +X RB7 20 500 -600 100 L 40 40 1 1 B +X RC0 3 500 -400 100 L 40 40 1 1 B +X RC1 4 500 -300 100 L 40 40 1 1 B +X RC2 5 500 -200 100 L 40 40 1 1 B +X RC3 6 500 -100 100 L 40 40 1 1 B +X RC4 7 500 0 100 L 40 40 1 1 B +X RC5 8 500 100 100 L 40 40 1 1 B +X RC6 9 500 200 100 L 40 40 1 1 B +X RC7 10 500 300 100 L 40 40 1 1 B +X RD0 43 500 500 100 L 40 40 1 1 B +X RD1 42 500 600 100 L 40 40 1 1 B +X RD2 41 500 700 100 L 40 40 1 1 B +X RD3 40 500 800 100 L 40 40 1 1 B +X RD4 39 500 900 100 L 40 40 1 1 B +X RD5 38 500 1000 100 L 40 40 1 1 B +X RD6 37 500 1100 100 L 40 40 1 1 B +X RD7 36 500 1200 100 L 40 40 1 1 B +X RE0 32 500 1400 100 L 40 40 1 1 B +X RE1 31 500 1500 100 L 40 40 1 1 B +X RE2 30 500 1600 100 L 40 40 1 1 B +X TEST 29 -500 100 100 R 40 40 1 1 I +X VDD 1 -500 1600 100 R 40 40 1 1 W +X VDD@1 44 -500 1500 100 R 40 40 1 1 W +X VSS 11 -500 -1700 100 R 40 40 1 1 W +X VSS@1 12 -500 -1800 100 R 40 40 1 1 W +X VSS@2 33 -500 -1900 100 R 40 40 1 1 W +X VSS@3 34 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C44P-40 +# Package Name: DIL40 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C44P-40 IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1 +F0 "IC" -400 1950 50 H V L B +F1 "PIC17C44P-40" -400 -2000 50 H V L B +F2 "microchip-5-DIL40" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -1900 400 -1900 +P 2 1 0 0 400 -1900 400 1900 +P 2 1 0 0 400 1900 -400 1900 +P 2 1 0 0 -400 1900 -400 -1900 +T 0 -220 -1800 60 0 1 0 VSS +X MCLR\ 32 -500 900 100 R 40 40 1 1 I +X OSC1 19 -500 1300 100 R 40 40 1 1 I +X OSC2 20 -500 1100 100 R 40 40 1 1 O +X RA0 26 500 -1800 100 L 40 40 1 1 B +X RA1 25 500 -1700 100 L 40 40 1 1 B +X RA2 24 500 -1600 100 L 40 40 1 1 B +X RA3 23 500 -1500 100 L 40 40 1 1 B +X RA4 22 500 -1400 100 L 40 40 1 1 B +X RA5 21 500 -1300 100 L 40 40 1 1 B +X RB0 11 500 -1100 100 L 40 40 1 1 B +X RB1 12 500 -1000 100 L 40 40 1 1 B +X RB2 13 500 -900 100 L 40 40 1 1 B +X RB3 14 500 -800 100 L 40 40 1 1 B +X RB4 15 500 -700 100 L 40 40 1 1 B +X RB5 16 500 -600 100 L 40 40 1 1 B +X RB6 17 500 -500 100 L 40 40 1 1 B +X RB7 18 500 -400 100 L 40 40 1 1 B +X RC0 2 500 -200 100 L 40 40 1 1 O +X RC1 3 500 -100 100 L 40 40 1 1 O +X RC2 4 500 0 100 L 40 40 1 1 O +X RC3 5 500 100 100 L 40 40 1 1 O +X RC4 6 500 200 100 L 40 40 1 1 O +X RC5 7 500 300 100 L 40 40 1 1 O +X RC6 8 500 400 100 L 40 40 1 1 O +X RC7 9 500 500 100 L 40 40 1 1 O +X RD0 40 500 700 100 L 40 40 1 1 B +X RD1 39 500 800 100 L 40 40 1 1 B +X RD2 38 500 900 100 L 40 40 1 1 B +X RD3 37 500 1000 100 L 40 40 1 1 B +X RD4 36 500 1100 100 L 40 40 1 1 B +X RD5 35 500 1200 100 L 40 40 1 1 B +X RD6 34 500 1300 100 L 40 40 1 1 B +X RD7 33 500 1400 100 L 40 40 1 1 B +X RE0 30 500 1600 100 L 40 40 1 1 B +X RE1 29 500 1700 100 L 40 40 1 1 B +X RE2 28 500 1800 100 L 40 40 1 1 B +X TEST 27 -500 600 100 R 40 40 1 1 I +X VDD 1 -500 1800 100 R 40 40 1 1 W +X VSS 10 -500 -1700 100 R 40 40 1 1 W +X VSS@1 31 -500 -1800 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C44PQ +# Package Name: MQFP44-2 +# Dev Tech: 4 +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC17C44PQ IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 33IO-1MQ +F0 "IC" -400 1750 50 H V L B +F1 "PIC17C44PQ" -400 -2200 50 H V L B +F2 "microchip-5-MQFP44-2" 0 150 50 H I C C +DRAW +P 2 1 0 0 -400 -2100 400 -2100 +P 2 1 0 0 400 -2100 400 1700 +P 2 1 0 0 400 1700 -400 1700 +P 2 1 0 0 -400 1700 -400 -2100 +T 0 -220 1500 60 0 1 0 VDD +T 0 -190 -1800 60 0 1 0 VSS~ +T 0 -160 -1900 60 0 1 0 VSS~~ +T 0 -130 -2000 60 0 1 0 VSS~~~ +X MCLR\ 7 -500 300 100 R 40 40 1 1 I +X NC 18 -400 -1200 0 R 40 40 1 1 U +X OSC1 37 -500 700 100 R 40 40 1 1 I +X OSC2 38 -500 500 100 R 40 40 1 1 O +X RA0 44 500 -2000 100 L 40 40 1 1 B +X RA1 43 500 -1900 100 L 40 40 1 1 B +X RA2 42 500 -1800 100 L 40 40 1 1 B +X RA3 41 500 -1700 100 L 40 40 1 1 B +X RA4 40 500 -1600 100 L 40 40 1 1 B +X RA5 39 500 -1500 100 L 40 40 1 1 B +X RB0 29 500 -1300 100 L 40 40 1 1 B +X RB1 30 500 -1200 100 L 40 40 1 1 B +X RB2 31 500 -1100 100 L 40 40 1 1 B +X RB3 32 500 -1000 100 L 40 40 1 1 B +X RB4 33 500 -900 100 L 40 40 1 1 B +X RB5 34 500 -800 100 L 40 40 1 1 B +X RB6 35 500 -700 100 L 40 40 1 1 B +X RB7 36 500 -600 100 L 40 40 1 1 B +X RC0 19 500 -400 100 L 40 40 1 1 B +X RC1 20 500 -300 100 L 40 40 1 1 B +X RC2 21 500 -200 100 L 40 40 1 1 B +X RC3 22 500 -100 100 L 40 40 1 1 B +X RC4 23 500 0 100 L 40 40 1 1 B +X RC5 24 500 100 100 L 40 40 1 1 B +X RC6 25 500 200 100 L 40 40 1 1 B +X RC7 26 500 300 100 L 40 40 1 1 B +X RD0 15 500 500 100 L 40 40 1 1 B +X RD1 14 500 600 100 L 40 40 1 1 B +X RD2 13 500 700 100 L 40 40 1 1 B +X RD3 12 500 800 100 L 40 40 1 1 B +X RD4 11 500 900 100 L 40 40 1 1 B +X RD5 10 500 1000 100 L 40 40 1 1 B +X RD6 9 500 1100 100 L 40 40 1 1 B +X RD7 8 500 1200 100 L 40 40 1 1 B +X RE0 4 500 1400 100 L 40 40 1 1 B +X RE1 3 500 1500 100 L 40 40 1 1 B +X RE2 2 500 1600 100 L 40 40 1 1 B +X TEST 1 -500 100 100 R 40 40 1 1 I +X VDD 16 -500 1600 100 R 40 40 1 1 W +X VDD@1 17 -500 1500 100 R 40 40 1 1 W +X VSS 5 -500 -1700 100 R 40 40 1 1 W +X VSS@1 6 -500 -1800 100 R 40 40 1 1 W +X VSS@2 27 -500 -1900 100 R 40 40 1 1 W +X VSS@3 28 -500 -2000 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC17C75XPT +# Package Name: TQFP64 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 9 +# +DEF PIC17C75XPT IC 0 40 Y Y 9 L N +# Gate Name: G$1 +# Symbol Name: PIC17C75X +F0 "IC" -600 2150 50 H V L B +F1 "PIC17C75XPT" -600 -2400 50 H V L B +F2 "microchip-5-TQFP64" 0 150 50 H I C C +DRAW +P 2 1 0 0 -600 2100 600 2100 +P 2 1 0 0 600 2100 600 -2300 +P 2 1 0 0 600 -2300 -600 -2300 +P 2 1 0 0 -600 -2300 -600 2100 +X AVDD 19 -700 -2100 100 R 40 40 1 1 W +X AVSS 20 -700 -2200 100 R 40 40 1 1 W +X MCLR\ 7 -700 2000 100 R 40 40 1 1 I +X OSC1/CKIN 39 -700 1700 100 R 40 40 1 1 I +X OSC2/CKOUT 40 -700 1600 100 R 40 40 1 1 O +X RA0/INT 48 -700 1400 100 R 40 40 1 1 I +X RA1/TOCKI 33 -700 1300 100 R 40 40 1 1 I +X RA2/SCL 34 -700 1200 100 R 40 40 1 1 B +X RA3/SDA 35 -700 1100 100 R 40 40 1 1 B +X RA4/RX1 32 -700 1000 100 R 40 40 1 1 B +X RA5/TX1 31 -700 900 100 R 40 40 1 1 B +X RB0/CAP1 47 -700 700 100 R 40 40 1 1 B +X RB1/CAP2 46 -700 600 100 R 40 40 1 1 B +X RB2/PWM1 42 -700 500 100 R 40 40 1 1 B +X RB3/PWM2 45 -700 400 100 R 40 40 1 1 B +X RB4/TCLK12 44 -700 300 100 R 40 40 1 1 B +X RB5/TCLK3 43 -700 200 100 R 40 40 1 1 B +X RB6/SCK 36 -700 100 100 R 40 40 1 1 B +X RB7/SDO 37 -700 0 100 R 40 40 1 1 B +X RC0/AD0 58 700 1400 100 L 40 40 1 1 B +X RC1/AD1 55 700 1300 100 L 40 40 1 1 B +X RC2/AD2 54 700 1200 100 L 40 40 1 1 B +X RC3/AD3 53 700 1100 100 L 40 40 1 1 B +X RC4/AD4 52 700 1000 100 L 40 40 1 1 B +X RC5/AD5 51 700 900 100 L 40 40 1 1 B +X RC6/AD6 50 700 800 100 L 40 40 1 1 B +X RC7/AD7 49 700 700 100 L 40 40 1 1 B +X RD0/AD8 2 700 400 100 L 40 40 1 1 B +X RD1/AD9 1 700 300 100 L 40 40 1 1 B +X RD2/AD10 64 700 200 100 L 40 40 1 1 B +X RD3/AD11 63 700 100 100 L 40 40 1 1 B +X RD4/AD12 62 700 0 100 L 40 40 1 1 B +X RD5/AD13 61 700 -100 100 L 40 40 1 1 B +X RD6/AD14 60 700 -200 100 L 40 40 1 1 B +X RD7/AD15 59 700 -300 100 L 40 40 1 1 B +X RE0/ALE 3 700 -500 100 L 40 40 1 1 B +X RE1/OE\ 4 700 -600 100 L 40 40 1 1 B +X RE2/WR\ 5 700 -700 100 L 40 40 1 1 B +X RE3/CAP4 6 700 -800 100 L 40 40 1 1 B +X RF0/AN4 18 -700 -1200 100 R 40 40 1 1 B +X RF1/AN5 17 -700 -1300 100 R 40 40 1 1 B +X RF2/AN6 16 -700 -1400 100 R 40 40 1 1 B +X RF3/AN7 15 -700 -1500 100 R 40 40 1 1 B +X RF4/AN8 14 -700 -1600 100 R 40 40 1 1 B +X RF5/AN9 13 -700 -1700 100 R 40 40 1 1 B +X RF6/AN10 12 -700 -1800 100 R 40 40 1 1 B +X RF7/AN11 11 -700 -1900 100 R 40 40 1 1 B +X RG0/AN3 24 -700 -1000 100 R 40 40 1 1 B +X RG1/AN2 23 -700 -900 100 R 40 40 1 1 B +X RG2/AN1 22 -700 -800 100 R 40 40 1 1 B +X RG3/AN0 21 -700 -700 100 R 40 40 1 1 B +X RG4/CAP3 27 -700 -200 100 R 40 40 1 1 B +X RG5/PWM3 28 -700 -300 100 R 40 40 1 1 B +X RG6/RX2 29 -700 -400 100 R 40 40 1 1 B +X RG7/TX2 30 -700 -500 100 R 40 40 1 1 B +X TEST 8 -700 1900 100 R 40 40 1 1 I +# Gate Name: P1 +# Symbol Name: VDD +X VDD 10 0 100 100 D 40 40 2 1 W +# Gate Name: P2 +# Symbol Name: VDD +X VDD 26 0 100 100 D 40 40 3 1 W +# Gate Name: P3 +# Symbol Name: VDD +X VDD 38 0 100 100 D 40 40 4 1 W +# Gate Name: P4 +# Symbol Name: VDD +X VDD 57 0 100 100 D 40 40 5 1 W +# Gate Name: P5 +# Symbol Name: VSS +X VSS 9 0 -100 100 U 40 40 6 1 W +# Gate Name: P6 +# Symbol Name: VSS +X VSS 25 0 -100 100 U 40 40 7 1 W +# Gate Name: P7 +# Symbol Name: VSS +X VSS 41 0 -100 100 U 40 40 8 1 W +# Gate Name: P8 +# Symbol Name: VSS +X VSS 56 0 -100 100 U 40 40 9 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC14000JW +# Package Name: DIL28-6 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC14000JW IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 14000 +F0 "IC" -300 1150 50 H V L B +F1 "PIC14000JW" -300 -1300 50 H V L B +F2 "microchip-5-DIL28-6" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1200 400 -1200 +P 2 1 0 0 400 -1200 400 1100 +P 2 1 0 0 400 1100 -300 1100 +P 2 1 0 0 -300 1100 -300 -1200 +X CDAC 22 -400 -400 100 R 40 40 1 1 O +X MCLR\ 14 -400 300 100 R 40 40 1 1 I +X OSC1 8 -400 700 100 R 40 40 1 1 I +X OSC2 7 -400 500 100 R 40 40 1 1 O +X RA0 2 500 -1100 100 L 40 40 1 1 B +X RA1 1 500 -1000 100 L 40 40 1 1 B +X RA2 28 500 -900 100 L 40 40 1 1 B +X RA3 27 500 -800 100 L 40 40 1 1 B +X RC0 19 500 -600 100 L 40 40 1 1 B +X RC1 18 500 -500 100 L 40 40 1 1 B +X RC2 17 500 -400 100 L 40 40 1 1 B +X RC3 16 500 -300 100 L 40 40 1 1 B +X RC4 15 500 -200 100 L 40 40 1 1 B +X RC5 13 500 -100 100 L 40 40 1 1 B +X RC6 12 500 0 100 L 40 40 1 1 B +X RC7 11 500 100 100 L 40 40 1 1 B +X RD0 6 500 300 100 L 40 40 1 1 B +X RD1 5 500 400 100 L 40 40 1 1 B +X RD2 4 500 500 100 L 40 40 1 1 B +X RD3 3 500 600 100 L 40 40 1 1 B +X RD4 26 500 700 100 L 40 40 1 1 B +X RD5 25 500 800 100 L 40 40 1 1 B +X RD6 24 500 900 100 L 40 40 1 1 B +X RD7 23 500 1000 100 L 40 40 1 1 B +X SUM 21 -400 -200 100 R 40 40 1 1 O +X VDD 9 -400 1000 100 R 40 40 1 1 W +X VREG 10 -400 0 100 R 40 40 1 1 O +X VSS 20 -400 -1100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC14000SO +# Package Name: SO-28W +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC14000SO IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 14000 +F0 "IC" -300 1150 50 H V L B +F1 "PIC14000SO" -300 -1300 50 H V L B +F2 "microchip-5-SO-28W" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1200 400 -1200 +P 2 1 0 0 400 -1200 400 1100 +P 2 1 0 0 400 1100 -300 1100 +P 2 1 0 0 -300 1100 -300 -1200 +X CDAC 22 -400 -400 100 R 40 40 1 1 O +X MCLR\ 14 -400 300 100 R 40 40 1 1 I +X OSC1 8 -400 700 100 R 40 40 1 1 I +X OSC2 7 -400 500 100 R 40 40 1 1 O +X RA0 2 500 -1100 100 L 40 40 1 1 B +X RA1 1 500 -1000 100 L 40 40 1 1 B +X RA2 28 500 -900 100 L 40 40 1 1 B +X RA3 27 500 -800 100 L 40 40 1 1 B +X RC0 19 500 -600 100 L 40 40 1 1 B +X RC1 18 500 -500 100 L 40 40 1 1 B +X RC2 17 500 -400 100 L 40 40 1 1 B +X RC3 16 500 -300 100 L 40 40 1 1 B +X RC4 15 500 -200 100 L 40 40 1 1 B +X RC5 13 500 -100 100 L 40 40 1 1 B +X RC6 12 500 0 100 L 40 40 1 1 B +X RC7 11 500 100 100 L 40 40 1 1 B +X RD0 6 500 300 100 L 40 40 1 1 B +X RD1 5 500 400 100 L 40 40 1 1 B +X RD2 4 500 500 100 L 40 40 1 1 B +X RD3 3 500 600 100 L 40 40 1 1 B +X RD4 26 500 700 100 L 40 40 1 1 B +X RD5 25 500 800 100 L 40 40 1 1 B +X RD6 24 500 900 100 L 40 40 1 1 B +X RD7 23 500 1000 100 L 40 40 1 1 B +X SUM 21 -400 -200 100 R 40 40 1 1 O +X VDD 9 -400 1000 100 R 40 40 1 1 W +X VREG 10 -400 0 100 R 40 40 1 1 O +X VSS 20 -400 -1100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC14000SP +# Package Name: DIL28-3 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC14000SP IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 14000 +F0 "IC" -300 1150 50 H V L B +F1 "PIC14000SP" -300 -1300 50 H V L B +F2 "microchip-5-DIL28-3" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1200 400 -1200 +P 2 1 0 0 400 -1200 400 1100 +P 2 1 0 0 400 1100 -300 1100 +P 2 1 0 0 -300 1100 -300 -1200 +X CDAC 22 -400 -400 100 R 40 40 1 1 O +X MCLR\ 14 -400 300 100 R 40 40 1 1 I +X OSC1 8 -400 700 100 R 40 40 1 1 I +X OSC2 7 -400 500 100 R 40 40 1 1 O +X RA0 2 500 -1100 100 L 40 40 1 1 B +X RA1 1 500 -1000 100 L 40 40 1 1 B +X RA2 28 500 -900 100 L 40 40 1 1 B +X RA3 27 500 -800 100 L 40 40 1 1 B +X RC0 19 500 -600 100 L 40 40 1 1 B +X RC1 18 500 -500 100 L 40 40 1 1 B +X RC2 17 500 -400 100 L 40 40 1 1 B +X RC3 16 500 -300 100 L 40 40 1 1 B +X RC4 15 500 -200 100 L 40 40 1 1 B +X RC5 13 500 -100 100 L 40 40 1 1 B +X RC6 12 500 0 100 L 40 40 1 1 B +X RC7 11 500 100 100 L 40 40 1 1 B +X RD0 6 500 300 100 L 40 40 1 1 B +X RD1 5 500 400 100 L 40 40 1 1 B +X RD2 4 500 500 100 L 40 40 1 1 B +X RD3 3 500 600 100 L 40 40 1 1 B +X RD4 26 500 700 100 L 40 40 1 1 B +X RD5 25 500 800 100 L 40 40 1 1 B +X RD6 24 500 900 100 L 40 40 1 1 B +X RD7 23 500 1000 100 L 40 40 1 1 B +X SUM 21 -400 -200 100 R 40 40 1 1 O +X VDD 9 -400 1000 100 R 40 40 1 1 W +X VREG 10 -400 0 100 R 40 40 1 1 O +X VSS 20 -400 -1100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +# +# Dev Name: PIC14000SS +# Package Name: SSOP28 +# Dev Tech: '' +# Dev Prefix: IC +# Gate count = 1 +# +DEF PIC14000SS IC 0 40 Y Y 1 L N +# Gate Name: G$1 +# Symbol Name: 14000 +F0 "IC" -300 1150 50 H V L B +F1 "PIC14000SS" -300 -1300 50 H V L B +F2 "microchip-5-SSOP28" 0 150 50 H I C C +DRAW +P 2 1 0 0 -300 -1200 400 -1200 +P 2 1 0 0 400 -1200 400 1100 +P 2 1 0 0 400 1100 -300 1100 +P 2 1 0 0 -300 1100 -300 -1200 +X CDAC 22 -400 -400 100 R 40 40 1 1 O +X MCLR\ 14 -400 300 100 R 40 40 1 1 I +X OSC1 8 -400 700 100 R 40 40 1 1 I +X OSC2 7 -400 500 100 R 40 40 1 1 O +X RA0 2 500 -1100 100 L 40 40 1 1 B +X RA1 1 500 -1000 100 L 40 40 1 1 B +X RA2 28 500 -900 100 L 40 40 1 1 B +X RA3 27 500 -800 100 L 40 40 1 1 B +X RC0 19 500 -600 100 L 40 40 1 1 B +X RC1 18 500 -500 100 L 40 40 1 1 B +X RC2 17 500 -400 100 L 40 40 1 1 B +X RC3 16 500 -300 100 L 40 40 1 1 B +X RC4 15 500 -200 100 L 40 40 1 1 B +X RC5 13 500 -100 100 L 40 40 1 1 B +X RC6 12 500 0 100 L 40 40 1 1 B +X RC7 11 500 100 100 L 40 40 1 1 B +X RD0 6 500 300 100 L 40 40 1 1 B +X RD1 5 500 400 100 L 40 40 1 1 B +X RD2 4 500 500 100 L 40 40 1 1 B +X RD3 3 500 600 100 L 40 40 1 1 B +X RD4 26 500 700 100 L 40 40 1 1 B +X RD5 25 500 800 100 L 40 40 1 1 B +X RD6 24 500 900 100 L 40 40 1 1 B +X RD7 23 500 1000 100 L 40 40 1 1 B +X SUM 21 -400 -200 100 R 40 40 1 1 O +X VDD 9 -400 1000 100 R 40 40 1 1 W +X VREG 10 -400 0 100 R 40 40 1 1 O +X VSS 20 -400 -1100 100 R 40 40 1 1 W +ENDDRAW +ENDDEF + +#End Library |