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authorBernhard Tittelbach <xro@realraum.at>2012-05-17 06:14:27 +0000
committerBernhard Tittelbach <xro@realraum.at>2012-05-17 06:14:27 +0000
commit33c96ee874cbd9548fcec54b97d1882548f3e50f (patch)
treea7742a9bc2aba0fa521154eaa9c7bc06083a1020 /software/hhd70dongle/c1101lib.h
parentspi and c1101 lib needs to be cleanly separated, code needs to be tested and ... (diff)
spi and c1101 code shuffling
git-svn-id: https://svn.spreadspace.org/mur.sat@417 7de4ea59-55d0-425e-a1af-a3118ea81d4c
Diffstat (limited to 'software/hhd70dongle/c1101lib.h')
-rw-r--r--software/hhd70dongle/c1101lib.h108
1 files changed, 103 insertions, 5 deletions
diff --git a/software/hhd70dongle/c1101lib.h b/software/hhd70dongle/c1101lib.h
index 19d057f..7224a61 100644
--- a/software/hhd70dongle/c1101lib.h
+++ b/software/hhd70dongle/c1101lib.h
@@ -34,13 +34,111 @@
#define C1101_FIFO_MAX_LEN 64
-#max len: 64 bytes
-void writeTXFifo(char *buffer, len);
+//read/write config registers:
+#define SPIC1101_ADDR_IOCFG2 0x00
+#define SPIC1101_ADDR_IOCFG1 0x01
+#define SPIC1101_ADDR_IOCFG0 0x02
+#define SPIC1101_ADDR_FIFOTHR 0x03
+#define SPIC1101_ADDR_SYNC1 0x04
+#define SPIC1101_ADDR_SYNC0 0x05
+#define SPIC1101_ADDR_PKTLEN 0x06
+#define SPIC1101_ADDR_PKTCTRL1 0x07
+#define SPIC1101_ADDR_PKTCTRL0 0x08
+#define SPIC1101_ADDR_ADDR 0x09
+#define SPIC1101_ADDR_CHANNR 0x0A
+#define SPIC1101_ADDR_FSCTRL1 0x0B
+#define SPIC1101_ADDR_FSCTRL0 0x0C
+#define SPIC1101_ADDR_FREQ2 0x0D
+#define SPIC1101_ADDR_FREQ1 0x0E
+#define SPIC1101_ADDR_FREQ0 0x0F
+#define SPIC1101_ADDR_MDMCFG4 0x10
+#define SPIC1101_ADDR_MDMCFG3 0x11
+#define SPIC1101_ADDR_MDMCFG2 0x12
+#define SPIC1101_ADDR_MDMCFG1 0x13
+#define SPIC1101_ADDR_MDMCFG0 0x14
+#define SPIC1101_ADDR_DEVIATN 0x15
+#define SPIC1101_ADDR_MCSM2 0x16
+#define SPIC1101_ADDR_MCSM1 0x17
+#define SPIC1101_ADDR_MCSM0 0x18
+#define SPIC1101_ADDR_FOCCFG 0x19
+#define SPIC1101_ADDR_BSCFG 0x1A
+#define SPIC1101_ADDR_AGCCTRL2 0x1B
+#define SPIC1101_ADDR_AGCCTRL1 0x1C
+#define SPIC1101_ADDR_AGCCTRL0 0x1D
+#define SPIC1101_ADDR_WOREVT1 0x1E
+#define SPIC1101_ADDR_WOREVT0 0x1F
+#define SPIC1101_ADDR_WORCTRL 0x20
+#define SPIC1101_ADDR_FREND1 0x21
+#define SPIC1101_ADDR_FREND0 0x22
+#define SPIC1101_ADDR_FSCAL3 0x23
+#define SPIC1101_ADDR_FSCAL2 0x24
+#define SPIC1101_ADDR_FSCAL1 0x25
+#define SPIC1101_ADDR_FSCAL0 0x26
+#define SPIC1101_ADDR_RCCTRL1 0x27
+#define SPIC1101_ADDR_RCCTRL0 0x28
+#define SPIC1101_ADDR_FSTEST 0x29
+#define SPIC1101_ADDR_PTEST 0x2A
+#define SPIC1101_ADDR_AGCTEST 0x2B
+#define SPIC1101_ADDR_TEST2 0x2C
+#define SPIC1101_ADDR_TEST1 0x2D
+#define SPIC1101_ADDR_TEST0 0x2E
-#max returned: 64 bytes
+//commands:
+#define SPIC1101_ADDR_SRES 0x30
+#define SPIC1101_ADDR_SFSTXON 0x31
+#define SPIC1101_ADDR_SXOFF 0x32
+#define SPIC1101_ADDR_SCAL 0x33
+#define SPIC1101_ADDR_SRX 0x34
+#define SPIC1101_ADDR_STX 0x35
+#define SPIC1101_ADDR_SIDLE 0x36
+#define SPIC1101_ADDR_SWOR 0x38
+#define SPIC1101_ADDR_SPWD 0x39
+#define SPIC1101_ADDR_SFRX 0x3A
+#define SPIC1101_ADDR_SFTX 0x3B
+#define SPIC1101_ADDR_SWORRST 0x3C
+#define SPIC1101_ADDR_SNOP 0x3D
+
+//readonly registers:
+#define SPIC1101_ADDR_PARTNUM (0x30 | 0xC0)
+#define SPIC1101_ADDR_VERSION (0x31 | 0xC0)
+#define SPIC1101_ADDR_FREQUEST (0x32 | 0xC0)
+#define SPIC1101_ADDR_LQI (0x33 | 0xC0)
+#define SPIC1101_ADDR_RSSI (0x34 | 0xC0)
+#define SPIC1101_ADDR_MARCSTATE (0x35 | 0xC0)
+#define SPIC1101_ADDR_WORTIME1 (0x36 | 0xC0)
+#define SPIC1101_ADDR_WORTIME0 (0x37 | 0xC0)
+#define SPIC1101_ADDR_PKTSTATUS (0x38 | 0xC0)
+#define SPIC1101_ADDR_VCO_VC_DAC (0x39 | 0xC0)
+#define SPIC1101_ADDR_TXBYTES (0x3A | 0xC0)
+#define SPIC1101_ADDR_RXBYTES (0x3B | 0xC0)
+#define SPIC1101_ADDR_RCCTRL1_STATUS (0x3C | 0xC0)
+#define SPIC1101_ADDR_RCCTRL0_STATUS (0x3D | 0xC0)
+
+
+#define SPIC1101_ADDR_FIFO_READ (0x3F | 0x80)
+#define SPIC1101_ADDR_FIFO_READ_BURST (0x3F | 0x80 | 0xC0)
+#define SPIC1101_ADDR_FIFO_WRITE 0x3F
+#define SPIC1101_ADDR_FIFO_WRITE_BURST (0x3F | 0x40)
+
+#define SPIC1101_SB_CHIPRDY(x) x & 0b1000000
+#define SPIC1101_SB_IDLE(x) (x & 0b0111000) == 0b000000
+#define SPIC1101_SB_RXMODE(x) (x & 0b0111000) == 0b001000
+#define SPIC1101_SB_TXMODE(x) (x & 0b0111000) == 0b010000
+#define SPIC1101_SB_FSTXON(x) (x & 0b0111000) == 0b011000
+#define SPIC1101_SB_CALIBRATE(x) (x & 0b0111000) == 0b100000
+#define SPIC1101_SB_SETTLING(x) (x & 0b0111000) == 0b101000
+#define SPIC1101_SB_RXFIFO_OVERFLOW(x) (x & 0b0111000b) == 0b110000
+#define SPIC1101_SB_TXFIFO_OVERFLOW(x) (x & 0b0111000b) == 0b111000
+#define SPIC1101_SB_FIFO_BYTES_AVAILABLE(x) (x & 0b0000111)
+
+
+//max len: 64 bytes
+void writeTXFifo(char *buffer, unsigned int len);
+
+//max returned: 64 bytes
int readRXFifo(char *buffer);
-#set WakeOnRadio to enabled (true) or disabled(false)
-void setWOR(bool enable);
+//set WakeOnRadio to enabled (true) or disabled(false)
+void setWOR(int enable);
#endif