diff options
| author | Matthias Braunecker <matthias@braunecker.at> | 2012-09-14 16:14:05 +0000 |
|---|---|---|
| committer | Matthias Braunecker <matthias@braunecker.at> | 2012-09-14 16:14:05 +0000 |
| commit | 562bba725032d8ba97970aac6675c24f2914f46b (patch) | |
| tree | 090c9d8375fc0b3a57797606879c6d93c84729d7 /contrib/kicad-libs/mur-sat.lib | |
| parent | added LPC1343 to mur-sat.lib (diff) | |
LPC1343 update
git-svn-id: https://svn.spreadspace.org/mur.sat@641 7de4ea59-55d0-425e-a1af-a3118ea81d4c
Diffstat (limited to 'contrib/kicad-libs/mur-sat.lib')
| -rw-r--r-- | contrib/kicad-libs/mur-sat.lib | 62 |
1 files changed, 61 insertions, 1 deletions
diff --git a/contrib/kicad-libs/mur-sat.lib b/contrib/kicad-libs/mur-sat.lib index 4b1a922..ff87e37 100644 --- a/contrib/kicad-libs/mur-sat.lib +++ b/contrib/kicad-libs/mur-sat.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 Date: 14.09.2012 18:06:43
+EESchema-LIBRARY Version 2.3 Date: 14.09.2012 18:13:30
#encoding utf-8
#
# AD8027
@@ -255,6 +255,66 @@ X VDD 18 850 400 200 L 50 50 1 1 W ENDDRAW
ENDDEF
#
+# LPC1343
+#
+DEF LPC1343 U 0 40 Y Y 1 F N
+F0 "U" 0 -100 50 H V C CNN
+F1 "LPC1343" 0 100 50 H V C CNN
+F2 "MODULE" 0 0 50 H I C CNN
+F3 "DOCUMENTATION" 0 0 50 H I C CNN
+DRAW
+S -1450 -1350 1450 1350 1 0 0 N
+X PIO2_6 1 -1750 1150 300 R 50 50 1 1 U
+X PIO2_0/DTR 2 -1750 1050 300 R 50 50 1 1 U
+X RESET/PIO0_0 3 -1750 950 300 R 50 50 1 1 U
+X PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE 4 -1750 850 300 R 50 50 1 1 U
+X VSSIO 5 -1750 750 300 R 50 50 1 1 U
+X XTALIN 6 -1750 650 300 R 50 50 1 1 U
+X XTALOUT 7 -1750 550 300 R 50 50 1 1 U
+X VDDIO 8 -1750 450 300 R 50 50 1 1 U
+X PIO1_8/CT16B1_CAP0 9 -1750 350 300 R 50 50 1 1 U
+X PIO0_2/SSEL/CT16B0_CAP0 10 -1750 250 300 R 50 50 1 1 U
+X USB_DP 20 -1750 -750 300 R 50 50 1 1 U
+X PIO1_10/AD6/CT16B1_MAT1 30 1750 -650 300 L 50 50 1 1 U
+X PIO1_4/AD5/CT32B1_MAT3/WAKEUP 40 1750 350 300 L 50 50 1 1 U
+X PIO2_7 11 -1750 150 300 R 50 50 1 1 U
+X PIO2_5 21 -1750 -850 300 R 50 50 1 1 U
+X TMS/PIO0_11/AD0/CT32B0_MAT3 31 1750 -550 300 L 50 50 1 1 U
+X VSS 41 1750 450 300 L 50 50 1 1 U
+X PIO2_8 12 -1750 50 300 R 50 50 1 1 U
+X PIO0_6/USB_CONNECT/SCK 22 -1750 -950 300 R 50 50 1 1 U
+X TDI/PIO0_11/AD0/CT32B0_MAT3 32 1750 -450 300 L 50 50 1 1 U
+X PIO1_11/AD7 42 1750 550 300 L 50 50 1 1 U
+X PIO2_1/DSR 13 -1750 -50 300 R 50 50 1 1 U
+X PIO0_7/CTS 23 -1750 -1050 300 R 50 50 1 1 U
+X TMS/PIO1_0/AD1/CT32B1_CAP0 33 1750 -350 300 L 50 50 1 1 U
+X PIO3_2 43 1750 650 300 L 50 50 1 1 U
+X PIO3_0/USB_VBUS 14 -1750 -150 300 R 50 50 1 1 U
+X PIO2_9 24 -1750 -1150 300 R 50 50 1 1 U
+X TDO/PIO1_1/AD2/CT32B1_MAT0 34 1750 -250 300 L 50 50 1 1 U
+X VDD3V3 44 1750 750 300 L 50 50 1 1 U
+X PIO0_4/SCL 15 -1750 -250 300 R 50 50 1 1 U
+X PIO2_10 25 1750 -1150 300 L 50 50 1 1 U
+X TRST/PIO1_2/AD3/CT32B1_MAT1 35 1750 -150 300 L 50 50 1 1 U
+X PIO1_5/RTS/CT32B0_CAP0 45 1750 850 300 L 50 50 1 1 U
+X PIO0_5/SDA 16 -1750 -350 300 R 50 50 1 1 U
+X PIO2_2/DCD 26 1750 -1050 300 L 50 50 1 1 U
+X PIO3_0 36 1750 -50 300 L 50 50 1 1 U
+X PIO1_6/RXD/CT32B0_MAT0 46 1750 950 300 L 50 50 1 1 U
+X PIO1_9/CT16B1_MAT0 17 -1750 -450 300 R 50 50 1 1 U
+X PIO0_8/MISO/CT16B0_MAT0 27 1750 -950 300 L 50 50 1 1 U
+X PIO3_1 37 1750 50 300 L 50 50 1 1 U
+X PIO1_7/TXD/CT32B0_MAT1 47 1750 1050 300 L 50 50 1 1 U
+X PIO2_4 18 -1750 -550 300 R 50 50 1 1 U
+X PIO0_9/MOSI/CT16B0_MAT1/SWO 28 1750 -850 300 L 50 50 1 1 U
+X PIO2_3/RI 38 1750 150 300 L 50 50 1 1 U
+X PIO3_3 48 1750 1150 300 L 50 50 1 1 U
+X USB_DM 19 -1750 -650 300 R 50 50 1 1 U
+X SWCLK/PIO0_10/SCK/CT16B0_MAT2 29 1750 -750 300 L 50 50 1 1 U
+X SWDIO/PIO1_3/AD4/CT32B1_MAT2 39 1750 250 300 L 50 50 1 1 U
+ENDDRAW
+ENDDEF
+#
# LT1962
#
DEF LT1962 U 0 40 Y Y 1 F N
|