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/*
*
* mur.sat
*
* Somewhen in the year 20xx, mur.at will have a nano satellite launched
* into a low earth orbit (310 km above the surface of our planet). The
* satellite itself is a TubeSat personal satellite kit, developed and
* launched by interorbital systems. mur.sat is a joint venture of mur.at,
* ESC im Labor and realraum.
*
* Please visit the project hompage at sat.mur.at for further information.
*
*
* Copyright (C) 2012 Bernhard Tittelbach <xro@realraum.at>
* 2015 Christian Pointner <equinox@mur.at>
*
* This file is part of mur.sat.
*
* mur.sat is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* any later version.
*
* mur.sat is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with mur.sat. If not, see <http://www.gnu.org/licenses/>.
*
*/
#include "avr/io.h"
#include "hhd70.h"
#define BIAS_VAL OCR1BL
static void hhd70_bias_init(void)
{
DDRB |= (1<<PB6);
TCCR1B = 0;
TCNT1 = 0;
OCR1B = 0;
TCCR1A = (1<<COM1B1) | (1<<WGM10);
TCCR1B = (1<<WGM12);
}
static inline void hhd70_bias_on(void)
{
TCCR1B = (TCCR1B & 0xF8) | (1<<CS10);
}
static inline void hhd70_bias_off(void)
{
TCCR1B = (TCCR1B & 0xF8);
TCNT1 = 0;
}
void hhd70_init(void)
{
//configure Direction of SS / PB0 , MOSI and SCLK as Output to drive CS of CC1101
SPI_DDR = (1<<MOSI)|(1<<SCK)|(1<<CS)|(1<<TE)|(1<<BIAS_PWM);
SPI_PORT = (1<<CS) | (1<<GDO2) | (1<<BIAS_PWM);
SPCR = (1<<SPE)|(1<<MSTR); // | (0<<DORD) //select MSB first: DORD == 0
// SPSR = (0<<SPI2X) // f_osc/4
// SPSR = (1<<SPI2X) // f_osc/2
// SPSR = (1<<SPI2X); (4MHz vs. 8MHz)
hhd70_bias_init();
}
void hhd70_config_GDO0_OOK_output(bool output_mode)
{
hhd70_set_OOK_GDO0_low();
if (output_mode)
SPI_DDR |= (1 << GDO0);
else
SPI_DDR &= ~(1 << GDO0);
}
void hhd70_set_OOK_GDO0_high(void)
{
SPI_PORT |= (1 << GDO0);
}
void hhd70_set_OOK_GDO0_low(void)
{
//pull low
SPI_PORT &= ~(1<<GDO0);
}
void hhd70_set_OOK_GDO0_toggle(void)
{
SPI_PORT ^= (1 << GDO0);
}
void hhd70_spi_cs_enable(void)
{
//pull low
SPI_PORT &= ~(1<<CS);
}
void hhd70_spi_cs_disable(void)
{
//pull high
SPI_PORT |= (1<<CS);
}
#include "util.h"
void hhd70_c1101_wait_chip_rdy(void)
{
//c1101 will set MISO to low if ready
while (SPI_PINB_REG & (1<<MISO));
//~ unsigned int c;
//~ for (c=0; c < 0xFFFFFFFF && (SPI_PINB_REG & (1<<MISO)); c++);
//~ uint8_t debug_buff[6];
//~ usb_rawhid_send((uint8_t*)"spi waited for:",255);
//~ debug_sprint_int16hex(debug_buff, c);
//~ usb_rawhid_send(debug_buff,255);
}
void hhd70_spi_write_byte(char byte)
{
SPDR = byte; //Load byte to Data register
while(!(SPSR & (1<<SPIF))); // Wait for transmission complete
}
char hhd70_spi_exchange_byte(char byte)
{
hhd70_spi_write_byte(byte);
return SPDR;
}
char hhd70_spi_read_byte(void)
{
//transmit something so SCLK runs for 8 bits, so that slave can transfer 1 byte
return hhd70_spi_exchange_byte(0);
}
void hhd70_palna_txmode(void)
{
SPI_PORT |= (1<<TE);
hhd70_bias_on();
}
void hhd70_palna_rxmode(void)
{
SPI_PORT &= ~(1<<TE);
hhd70_bias_off();
}
void hhd70_palna_off(void)
{
SPI_PORT |= (1<<TE);
hhd70_bias_off();
}
int8_t hhd70_rx_data_available(void)
{
//check if GDO2 pin has been pulled low by c1101
return (SPI_PINB_REG & (1 << GDO2)) == 0;
}
void hhd70_bias_set(uint8_t val)
{
BIAS_VAL = val;
}
uint8_t hhd70_bias_get(void)
{
return BIAS_VAL;
}
void hhd70_bias_inc(void)
{
BIAS_VAL = (BIAS_VAL < 253) ? BIAS_VAL + 2 : 255;
}
void hhd70_bias_dec(void)
{
BIAS_VAL = (BIAS_VAL > 2) ? BIAS_VAL - 2 : 0;
}
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