summaryrefslogtreecommitdiff
path: root/lib/util.c
diff options
context:
space:
mode:
Diffstat (limited to 'lib/util.c')
-rw-r--r--lib/util.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/util.c b/lib/util.c
index f0622ce..c3a6776 100644
--- a/lib/util.c
+++ b/lib/util.c
@@ -64,7 +64,7 @@ void jtag_disable(void)
#define BOOTLOADER_VEC 0x3800
#elif defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__)
#define BOOTLOADER_VEC 0x3800
-#elif defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__)
+#elif defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) || defined(__BOARD_sparkfunProMicro__)
#define BOOTLOADER_VEC 0x3800
#elif defined(__BOARD_rhmixxx__)
#define BOOTLOADER_VEC 0xF000
@@ -80,7 +80,7 @@ void reset2bootloader(void)
#if defined(__BOARD_teensy1__) || defined(__BOARD_teensy1pp__) || defined(__BOARD_teensy2__) || defined(__BOARD_teensy2pp__) || \
defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__) || \
defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) || \
- defined(__BOARD_rhmixxx__) || defined(__BOARD_minimus__) || defined(__BOARD_minimus32__)
+ defined(__BOARD_rhmixxx__) || defined(__BOARD_minimus__) || defined(__BOARD_minimus32__) || defined(__BOARD_sparkfunProMicro__)
cli();
// disable watchdog, if enabled
// disable all peripherals
@@ -119,7 +119,7 @@ void reset2bootloader(void)
DDRB = 0; DDRC = 0; DDRD = 0;
PORTB = 0; PORTC = 0; PORTD = 0;
#elif defined(__BOARD_hhd70dongle2__) || defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__) || \
- defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__)
+ defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) || defined(__BOARD_sparkfunProMicro__)
EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0;
TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0;
DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0;