From 7e774fa9945ffc50018db24aeefe0e88d10caccf Mon Sep 17 00:00:00 2001
From: Bernhard Tittelbach <xro@realraum.at>
Date: Thu, 17 May 2012 06:14:21 +0000
Subject: hhd70 spi

git-svn-id: https://svn.spreadspace.org/mur.sat@414 7de4ea59-55d0-425e-a1af-a3118ea81d4c
---
 software/hhd70dongle/spi.c | 67 +++++++++++++++++++++++++++++++++++++---------
 1 file changed, 55 insertions(+), 12 deletions(-)

(limited to 'software/hhd70dongle/spi.c')

diff --git a/software/hhd70dongle/spi.c b/software/hhd70dongle/spi.c
index 0ffa1b9..618c581 100644
--- a/software/hhd70dongle/spi.c
+++ b/software/hhd70dongle/spi.c
@@ -35,7 +35,7 @@
 
 #define SPI_DDR DDRB
 #define SPI_PORT PORTB
-#define SPI_PIN  PINB
+#define SPI_PINB_REG  PINB
 #define CS   0
 #define SCK  1
 #define MOSI 2
@@ -47,24 +47,67 @@
 
 void spi_init(void)
 {
-  SPI_PORT = 0;
-  SPI_DDR = (1<<MOSI)|(1<<SCK)|(1<<CS);
-  SPCR = (1<<SPE)|(1<<MSTR);
-//  SPSR = (1<<SPI2X); (4MHz vs. 8MHz)
+    //configure Direction of SS / PB0 , MOSI and SCLK as Output to drive CS of CC1101
+    DDRB = (1<<DDB0) | (1<<DDB1) | (1<<DDB2);
+    SPI_PORT = 0;
+    SPI_DDR = (1<<MOSI)|(1<<SCK)|(1<<CS);
+    SPCR = (1<<SPE)|(1<<MSTR);
+    // SPSR = (0<<SPI2X) // f_osc/4 
+    // SPSR = (1<<SPI2X) // f_osc/2
+    //  SPSR = (1<<SPI2X); (4MHz vs. 8MHz)
 }
 
-void spi_write(char address, char* data, int len)
+//synchronous
+void spi_write_byte(char byte)
 {
+    SPDR = byte;					//Load byte to Data register
+    while(!(SPSR & (1<<SPIF))); 	// Wait for transmission complete
 }
 
-void spi_read(char address, char* data, int* len)
+void spi_write(char* data, unsigned int len)
 {
-  PORTB |= (1<<CS);
+    //enable SS of CC1101
+    PORTB |= (1<<CS);
 
-  while(SPI_PIN & (1<<MISO)); /* wait for CC1101 to get ready... */
+    for (unsigned int c=0; c++; c<len)
+        spi_write_byte(data[c])
+    
+    //disable SS of CC1101
+    PORTB &= ~(1<<CS);
+}
+
+void spi_read(unsigned int maxlen, char* data)
+{
+    PORTB |= (1<<CS);
 
-  SPDR = 0x80;
-  while(!(SPSR & (1<<SPIF)));
+    while(SPI_PINB_REG & (1<<MISO)); /* wait for CC1101 to get ready... */
 
-  PORTB &= ~(1<<CS);
+    SPDR = 0x80;
+    unsigned int len = 0;
+    while(len < maxlen && !(SPSR & (1<<SPIF)))
+    {
+        data[len++]=SPSR
+    }
+    PORTB &= ~(1<<CS);
 }
+
+
+//~ void SPI_interrupt(void) __interrupt (0x0053) __using (1)
+//~ {
+  //~ //P1_0=0;
+  //~ switch  ( SPSCR )         /* read and clear spi status register */
+  //~ {
+    //~ case 0x80:
+                     //~ serial_data=SPDAT;   /* read receive data */
+                     //~ transmit_completed=1;/* set software flag */
+     //~ break;
+
+    //~ case 0x10:
+         //~ /* put here for mode fault tasking */  
+    //~ break;
+  
+    //~ case 0x40:
+         //~ /* put here for overrun tasking */  
+    //~ break;
+  //~ }
+//~ }
-- 
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