From 490bb0dcd0a7b7d55088b203d2874f12724d137f Mon Sep 17 00:00:00 2001
From: Christian Pointner <equinox@mur.at>
Date: Sat, 7 Apr 2012 12:37:13 +0000
Subject: added TASC footprint added sc project

git-svn-id: https://svn.spreadspace.org/mur.sat@367 7de4ea59-55d0-425e-a1af-a3118ea81d4c
---
 hardware/hhd70dongle/hhd70dongle.pro |   2 +-
 hardware/sc/solarcells.brd           |  83 +++++++++++++++++++++++++
 hardware/sc/solarcells.pro           | 113 +++++++++++++++++++++++++++++++++++
 hardware/sc/solarcells.sch           |  46 ++++++++++++++
 4 files changed, 243 insertions(+), 1 deletion(-)
 create mode 100644 hardware/sc/solarcells.brd
 create mode 100644 hardware/sc/solarcells.pro
 create mode 100644 hardware/sc/solarcells.sch

(limited to 'hardware')

diff --git a/hardware/hhd70dongle/hhd70dongle.pro b/hardware/hhd70dongle/hhd70dongle.pro
index 5cd3599..4ad4417 100644
--- a/hardware/hhd70dongle/hhd70dongle.pro
+++ b/hardware/hhd70dongle/hhd70dongle.pro
@@ -1,4 +1,4 @@
-update=Mit 04 Apr 2012 19:20:52 CEST
+update=Mit 04 Apr 2012 20:02:43 CEST
 version=1
 last_client=pcbnew
 [cvpcb]
diff --git a/hardware/sc/solarcells.brd b/hardware/sc/solarcells.brd
new file mode 100644
index 0000000..299b9f4
--- /dev/null
+++ b/hardware/sc/solarcells.brd
@@ -0,0 +1,83 @@
+PCBNEW-BOARD Version 1 date Sam 07 Apr 2012 14:29:44 CEST
+
+# Created by Pcbnew(2010-00-09 BZR 23xx)-stable
+
+$GENERAL
+LayerCount 2
+Ly 1FFF8001
+EnabledLayers 1FFF8001
+Links 0
+NoConn 0
+Di 0 0 117000 82670
+Ndraw 0
+Ntrack 0
+Nzone 0
+BoardThickness 630
+Nmodule 0
+Nnets 1
+$EndGENERAL
+
+$SHEETDESCR
+Sheet A4 11700 8267
+Title ""
+Date "7 apr 2012"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndSHEETDESCR
+
+$SETUP
+InternalUnit 0.000100 INCH
+ZoneGridSize 250
+Layers 2
+Layer[0] Rückseite signal
+Layer[15] Vorderseite signal
+TrackWidth 80
+TrackClearence 100
+ZoneClearence 200
+TrackMinWidth 80
+DrawSegmWidth 150
+EdgeSegmWidth 150
+ViaSize 350
+ViaDrill 250
+ViaMinSize 350
+ViaMinDrill 200
+MicroViaSize 200
+MicroViaDrill 50
+MicroViasAllowed 0
+MicroViaMinSize 200
+MicroViaMinDrill 50
+TextPcbWidth 120
+TextPcbSize 600 800
+EdgeModWidth 150
+TextModSize 600 600
+TextModWidth 120
+PadSize 1276 11535
+PadDrill 0
+Pad2MaskClearance 100
+AuxiliaryAxisOrg 0 0
+$EndSETUP
+
+$EQUIPOT
+Na 0 ""
+St ~
+$EndEQUIPOT
+$NCLASS
+Name "Default"
+Desc "Dies ist die voreingestellte Netzklasse."
+Clearance 100
+TrackWidth 80
+ViaDia 350
+ViaDrill 250
+uViaDia 200
+uViaDrill 50
+AddNet ""
+$EndNCLASS
+$TRACK
+$EndTRACK
+$ZONE
+$EndZONE
+$EndBOARD
diff --git a/hardware/sc/solarcells.pro b/hardware/sc/solarcells.pro
new file mode 100644
index 0000000..c29fd36
--- /dev/null
+++ b/hardware/sc/solarcells.pro
@@ -0,0 +1,113 @@
+update=Sam 07 Apr 2012 14:31:13 CEST
+version=1
+last_client=eeschema
+[cvpcb]
+version=1
+NetITyp=0
+NetIExt=.net
+PkgIExt=.pkg
+NetDir=
+LibDir=
+NetType=0
+[cvpcb/libraries]
+EquName1=devcms
+[general]
+version=1
+[pcbnew]
+version=1
+PadDrlX=320
+PadDimH=600
+PadDimV=600
+BoardThickness=630
+SgPcb45=1
+TxtPcbV=800
+TxtPcbH=600
+TxtModV=600
+TxtModH=600
+TxtModW=120
+VEgarde=100
+DrawLar=150
+EdgeLar=150
+TxtLar=120
+MSegLar=150
+LastNetListRead=
+[pcbnew/libraries]
+LibDir=../../contrib/kicad-libs
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms
+LibName7=display
+LibName8=valves
+LibName9=led
+LibName10=dip_sockets
+LibName11=mur-sat
+[eeschema]
+version=1
+LibDir=../../contrib/kicad-libs
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
+offX_A2=0
+offY_A2=0
+offX_A1=0
+offY_A1=0
+offX_A0=0
+offY_A0=0
+offX_A=0
+offY_A=0
+offX_B=0
+offY_B=0
+offX_C=0
+offY_C=0
+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+SimCmd=
+UseNetN=0
+LabSize=60
+PrintMonochrome=1
+ShowSheetReferenceAndTitleBlock=1
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=special
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
+LibName31=mur-sat
diff --git a/hardware/sc/solarcells.sch b/hardware/sc/solarcells.sch
new file mode 100644
index 0000000..4e90506
--- /dev/null
+++ b/hardware/sc/solarcells.sch
@@ -0,0 +1,46 @@
+EESchema Schematic File Version 2  date Sam 07 Apr 2012 14:31:15 CEST
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:mur-sat
+EELAYER 43  0
+EELAYER END
+$Descr A4 11700 8267
+Sheet 1 1
+Title ""
+Date "7 apr 2012"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$EndSCHEMATC
-- 
cgit v1.2.3