From cb60c28b9b83d97ff1d3fc0fca529cb5cd0c2c19 Mon Sep 17 00:00:00 2001
From: Christian Pointner <equinox@mur.at>
Date: Thu, 27 Feb 2014 20:42:01 +0000
Subject: set line with and spacing

git-svn-id: https://svn.spreadspace.org/mur.sat@879 7de4ea59-55d0-425e-a1af-a3118ea81d4c
---
 hardware/mpu-cam/mpu-cam.brd | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

(limited to 'hardware/mpu-cam/mpu-cam.brd')

diff --git a/hardware/mpu-cam/mpu-cam.brd b/hardware/mpu-cam/mpu-cam.brd
index fab0f67..97be78e 100644
--- a/hardware/mpu-cam/mpu-cam.brd
+++ b/hardware/mpu-cam/mpu-cam.brd
@@ -1,4 +1,4 @@
-PCBNEW-BOARD Version 1 date Do 27 Feb 2014 20:54:29 CET
+PCBNEW-BOARD Version 1 date Do 27 Feb 2014 21:17:21 CET
 
 # Created by Pcbnew(2012-apr-16-27)-stable
 
@@ -36,15 +36,25 @@ Layers 2
 Layer[0] Rückseite signal
 Layer[15] Vorderseite signal
 TrackWidth 80
-TrackClearence 100
+TrackWidthList 80
+TrackWidthList 157
+TrackWidthList 276
+TrackWidthList 394
+TrackWidthList 709
+TrackClearence 60
 ZoneClearence 200
-TrackMinWidth 80
+TrackMinWidth 60
 DrawSegmWidth 150
 EdgeSegmWidth 150
-ViaSize 350
-ViaDrill 250
-ViaMinSize 350
-ViaMinDrill 200
+ViaSize 256
+ViaDrill 119
+ViaMinSize 197
+ViaMinDrill 119
+ViaSizeList 256 119
+ViaSizeList 295 157
+ViaSizeList 378 157
+ViaSizeList 472 177
+ViaSizeList 787 197
 MicroViaSize 200
 MicroViaDrill 50
 MicroViasAllowed 0
@@ -59,7 +69,7 @@ PadSize 600 600
 PadDrill 320
 Pad2MaskClearance 100
 AuxiliaryAxisOrg 0 0
-PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
+PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
 $EndSETUP
 
 $EQUIPOT
@@ -69,10 +79,10 @@ $EndEQUIPOT
 $NCLASS
 Name "Default"
 Desc "Dies ist die voreingestellte Netzklasse."
-Clearance 100
+Clearance 60
 TrackWidth 80
-ViaDia 350
-ViaDrill 250
+ViaDia 256
+ViaDrill 119
 uViaDia 200
 uViaDrill 50
 AddNet ""
-- 
cgit v1.2.3