summaryrefslogtreecommitdiff
path: root/software/hhd70dongle/c1101lib.c
diff options
context:
space:
mode:
Diffstat (limited to 'software/hhd70dongle/c1101lib.c')
-rw-r--r--software/hhd70dongle/c1101lib.c44
1 files changed, 36 insertions, 8 deletions
diff --git a/software/hhd70dongle/c1101lib.c b/software/hhd70dongle/c1101lib.c
index a6dd5f4..2f0400e 100644
--- a/software/hhd70dongle/c1101lib.c
+++ b/software/hhd70dongle/c1101lib.c
@@ -29,6 +29,7 @@
* along with mur.sat. If not, see <http://www.gnu.org/licenses/>.
*
*/
+#include <stdlib.h>
#include <avr/io.h>
#include <util/delay.h>
@@ -383,8 +384,10 @@ void c1101_init_ook_beacon(void)
//enable RX FIFO interrupt (i.e. GPO2 pulls high if >= FIFOTHR bytes are in RX FIFO)
c1101_spi_write_register(SPIC1101_ADDR_IOCFG2, 0x41 ); //0x40, 0x42, 0x44, 0x47
// pull GPO high (interrupt) if more than 12 bytes in rx buffer (or less than 53 in tx)
- c1101_spi_write_register(SPIC1101_ADDR_FIFOTHR,0x47); //RX FIFO and TX FIFO Thresholds
- c1101_spi_write_register(SPIC1101_ADDR_PKTCTRL0,0x12);//Packet Automation Control
+ //c1101_spi_write_register(SPIC1101_ADDR_FIFOTHR,0x47); //RX FIFO and TX FIFO Thresholds
+ c1101_spi_write_register(SPIC1101_ADDR_FIFOTHR, 0); //assert at 4 bytes in RX Fifo and 61 in TX Fifo
+ //c1101_spi_write_register(SPIC1101_ADDR_PKTCTRL0,0x12);//Packet Automation Control
+ c1101_spi_write_register(SPIC1101_ADDR_PKTCTRL0, 0b0000000001); //crc disabled; use FIFOs; variable packet length mode (first TX FIFO byte must be length)
c1101_spi_write_register(SPIC1101_ADDR_FSCTRL1,0x06); //Frequency Synthesizer Control
c1101_spi_write_register(SPIC1101_ADDR_FREQ2,0x10); //Frequency Control Word, High Byte
c1101_spi_write_register(SPIC1101_ADDR_FREQ1,0xBD); //Frequency Control Word, Middle Byte
@@ -448,6 +451,22 @@ uint16_t c1101_measureTemp(void)
return temp;
}
+void c1101_handleMARCStatusByte(char sb)
+{
+ //on RXFifo Overflow, Flush RX Fifo
+ if (sb == 0x11)
+ {
+ c1101_spi_strobe_command(SPIC1101_ADDR_SFRX);
+ CDC_Device_SendString(&VirtualSerial_CDC_Interface,"RX fifo flushed\r\n");
+ }
+ //on TXFifo Overflow, Flush TX Fifo
+ else if (sb == 0x16)
+ {
+ c1101_spi_strobe_command(SPIC1101_ADDR_SFTX);
+ CDC_Device_SendString(&VirtualSerial_CDC_Interface,"TX fifo flushed\r\n");
+ }
+}
+
void c1101_handleStatusByte(char sb)
{
//on RXFifo Overflow, Flush RX Fifo
@@ -495,7 +514,7 @@ uint8_t c1101_getNumBytesInTXFifo(void)
return c1101_spi_read_register(SPIC1101_ADDR_TXBYTES);
}
-void c1101_transmitData(char *buffer, unsigned int len)
+void c1101_transmitData(char *buffer, uint8_t len)
{
//~ uint8_t debug_sb[6];
uint8_t num_written = 0;
@@ -505,11 +524,7 @@ void c1101_transmitData(char *buffer, unsigned int len)
//~ c1101_spi_write_register(SPIC1101_ADDR_MCSM1, 0x18);
//~ c1101_spi_write_register(SPIC1101_ADDR_PKTCTRL0, 0b0000000001); //crc disabled; use FIFOs; variable packet length mode (first TX FIFO byte must be length)
// flush TX FIFO
- num_written = c1101_spi_strobe_command(SPIC1101_ADDR_SFTX);
-
- num_written = (uint8_t) len;
- //variable packet length: write length of packet to TX FIFO:
- c1101_spi_write_txfifo((char*) &num_written, 1);
+ c1101_spi_strobe_command(SPIC1101_ADDR_SFTX);
//~ //fill buffer
//~ num_written = c1101_spi_write_txfifo(buffer, len);
@@ -552,6 +567,7 @@ void c1101_transmitData(char *buffer, unsigned int len)
{
c1101_state = c1101_getMARCState();
_delay_ms(100);
+ c1101_handleMARCStatusByte(c1101_state);
}
while (!(c1101_state == 1 || (c1101_state >= 13 && c1101_state <= 15)));
//from state IDLE or RX go to TX
@@ -573,6 +589,7 @@ void c1101_transmitData(char *buffer, unsigned int len)
{
c1101_state = c1101_getMARCState();
_delay_ms(100);
+ c1101_handleMARCStatusByte(c1101_state);
}
while (c1101_state == 19 || c1101_state == 20);
@@ -581,6 +598,17 @@ void c1101_transmitData(char *buffer, unsigned int len)
hhd70_palna_rxmode();
}
+void c1101_transmitData_infPktMode(char *buffer, uint8_t len)
+{
+ //in infinite Packet Mode, prepend length to buffer:
+ char *new_buffer = malloc(len+1);
+ new_buffer[0] = len;
+ memcpy(new_buffer+1, buffer, len);
+ //variable packet length: write length of packet to TX FIFO:
+ c1101_transmitData(new_buffer, len+1);
+ free(new_buffer);
+}
+
void c1101_recieveData(void)
{
uint8_t const max_len=255;