diff options
| -rw-r--r-- | software/idm-test/idm-test.c | 8 | ||||
| -rw-r--r-- | software/idm/idm.asm | 40 |
2 files changed, 25 insertions, 23 deletions
diff --git a/software/idm-test/idm-test.c b/software/idm-test/idm-test.c index c72ab91..89363e6 100644 --- a/software/idm-test/idm-test.c +++ b/software/idm-test/idm-test.c @@ -104,7 +104,7 @@ void SetupHardware(void) TCCR0B = (1 << CS02);
- SPI_Init(SPI_SPEED_FCPU_DIV_16 | SPI_MODE_MASTER | SPI_ORDER_MSB_FIRST |
+ SPI_Init(SPI_SPEED_FCPU_DIV_8 | SPI_MODE_MASTER | SPI_ORDER_MSB_FIRST |
SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING);
SPI_CS_DDR |= (1<<CS);
SPI_CS_PORT |= (1<<CS);
@@ -158,7 +158,7 @@ int main(void) int16_t BytesReceived = CDC_Device_BytesReceived(&VirtualSerial_CDC_Interface);
while(BytesReceived > 0) {
int16_t ReceivedByte = CDC_Device_ReceiveByte(&VirtualSerial_CDC_Interface);
- if (!(ReceivedByte < 0)) {
+ if (ReceivedByte >= 0) {
switch(ReceivedByte) {
case 'p': PWRDWN_PORT &= ~(1<<PWRDWN); break;
case 'P': PWRDWN_PORT |= (1<<PWRDWN); break;
@@ -176,8 +176,8 @@ int main(void) if ((TIFR0 & (1 << TOV0)) || (BufferCount > (uint8_t)(sizeof(SPItoUSB_Buffer_Data) * .75))) {
TIFR0 |= (1 << TOV0);
while (BufferCount--) {
- if (CDC_Device_SendByte(&VirtualSerial_CDC_Interface,
- RingBuffer_Peek(&SPItoUSB_Buffer)) != ENDPOINT_READYWAIT_NoError)
+ if(CDC_Device_SendByte(&VirtualSerial_CDC_Interface,
+ RingBuffer_Peek(&SPItoUSB_Buffer)) != ENDPOINT_READYWAIT_NoError)
break;
RingBuffer_Remove(&SPItoUSB_Buffer);
diff --git a/software/idm/idm.asm b/software/idm/idm.asm index d2d68bc..34bfced 100644 --- a/software/idm/idm.asm +++ b/software/idm/idm.asm @@ -43,7 +43,7 @@ TMP EQU H'0023' ;; ------------------------------------- ;; Interrupts org .4 - clrf BSR + movlb b'00000000' btfsc PIR1,SSP1IF goto int_spi retfie @@ -51,9 +51,12 @@ TMP EQU H'0023' int_spi bsf PORTA,7 bcf PIR1,SSP1IF - incf TMP,f - movf TMP,w + movlb b'00000100' + movf SSP1BUF,w + incf INDF0,f + movf INDF0,w movwf SSP1BUF + movlb b'00000000' bcf PORTA,7 retfie @@ -61,43 +64,39 @@ int_spi ;; INIT init ;; BANK 4 - movlw b'00000100' - movwf BSR - movlw b'00100100' - movwf SSP1CON1 + movlb b'00000100' + movlw b'01000000' + movwf SSP1STAT movlw b'00010000' movwf SSP1CON3 - movlw b'00000000' - movwf SSP1STAT + movlw b'00100100' + movwf SSP1CON1 ;; BANK 3 - movlw b'00000011' - movwf BSR + movlb b'00000011' clrf ANSELA clrf ANSELB ;; BANK 2 - movlw b'00000010' - movwf BSR + movlb b'00000010' ;; BANK 1 - movlw b'00000001' - movwf BSR + movlb b'00000001' movlw b'01111111' movwf TRISA movlw b'01110011' movwf TRISB ; movlw b'01011000' ; 1 MHz ; movlw b'01100000' ; 2 MHz -; movlw b'01101000' ; 4 MHz + movlw b'01101000' ; 4 MHz ; movlw b'01110000' ; 8 MHz - movlw b'01111000' ; 16 MHz +; movlw b'01111000' ; 16 MHz movwf OSCCON movlw b'00001000' movwf PIE1 ;; BANK 0 - clrf BSR + movlb b'00000000' clrf PIR1 movlw b'11000000' movwf INTCON @@ -105,7 +104,10 @@ init bcf PORTB,3 - clrf TMP + clrf FSR0H + movlw TMP + movwf FSR0H + clrf INDF0 ;; ------------------------------------- ;; MAINLOOP |