diff options
-rw-r--r-- | contrib/kicad-libs/mur-sat.lib | 22 | ||||
-rw-r--r-- | hardware/mpu/mpu.brd | 64 | ||||
-rw-r--r-- | hardware/mpu/mpu.sch | 2 |
3 files changed, 39 insertions, 49 deletions
diff --git a/contrib/kicad-libs/mur-sat.lib b/contrib/kicad-libs/mur-sat.lib index 0ffa097..a59ba45 100644 --- a/contrib/kicad-libs/mur-sat.lib +++ b/contrib/kicad-libs/mur-sat.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 Date: Di 11 Jun 2013 02:04:33 CEST +EESchema-LIBRARY Version 2.3 Date: Fre 14 Jun 2013 14:49:32 CEST #encoding utf-8 # # AD8027 @@ -1089,32 +1089,32 @@ X PC1/ADC12_IN11 9 -1400 1550 200 R 50 50 1 1 B X PC2/ADC12_IN12 10 -1400 1450 200 R 50 50 1 1 B X PA4/SPI1_NSS 20 1450 1250 200 L 50 50 1 1 B X PB11/I2C2_SDA 30 1450 -1300 200 L 50 50 1 1 B -X PC9 40 -1400 750 200 R 50 50 1 1 B +X PC9/SDIO_D1 40 -1400 750 200 R 50 50 1 1 B X PA15 50 1450 150 200 L 50 50 1 1 B X BOOT0 60 -1400 -1450 200 R 50 50 1 1 I X PC3/ADC12_IN13 11 -1400 1350 200 R 50 50 1 1 B X PA5/SPI1_SCK 21 1450 1150 200 L 50 50 1 1 B X Vss_1 31 -100 -2050 200 U 50 50 1 1 W X PA8/UASRT1_CK 41 1450 850 200 L 50 50 1 1 B -X PC10 51 -1400 650 200 R 50 50 1 1 B -X PB8/TIM4_CH3 61 1450 -1000 200 L 50 50 1 1 B +X PC10/SDIO_D2 51 -1400 650 200 R 50 50 1 1 B +X PB8/TIM4_CH3/SDIO_D4 61 1450 -1000 200 L 50 50 1 1 B X Vss_A 12 -250 -2050 200 U 50 50 1 1 W X PA6/SPI1_MISO 22 1450 1050 200 L 50 50 1 1 B X Vdd_1 32 -100 2000 200 D 50 50 1 1 W X PA9/UASRT1_TX 42 1450 750 200 L 50 50 1 1 B -X PC11 52 -1400 550 200 R 50 50 1 1 B -X PB9/TIM4_CH4 62 1450 -1100 200 L 50 50 1 1 B +X PC11/SDIO_D3 52 -1400 550 200 R 50 50 1 1 B +X PB9/TIM4_CH4/SDIO_D5 62 1450 -1100 200 L 50 50 1 1 B X Vdd_A 13 -350 2000 200 D 50 50 1 1 W X PA7/SPI1_MOSI 23 1450 950 200 L 50 50 1 1 B X PB12/SPI2_NSS 33 1450 -1400 200 L 50 50 1 1 B X PA10/UASRT1_RX 43 1450 650 200 L 50 50 1 1 B -X PC12 53 -1400 450 200 R 50 50 1 1 B +X PC12/SDIO_CK 53 -1400 450 200 R 50 50 1 1 B X Vss_3 63 100 -2050 200 U 50 50 1 1 W X PA0/WKUP/USART2_CTS 14 1450 1650 200 L 50 50 1 1 B X PC4/ADC12_IN14 24 -1400 1250 200 R 50 50 1 1 B X PB13/SPI2_SCK 34 1450 -1500 200 L 50 50 1 1 B X PA11/USART1_CTS 44 1450 550 200 L 50 50 1 1 B -X PD2/TIM3_ETR 54 -1400 -1200 200 R 50 50 1 1 B +X PD2/TIM3_ETR/SDIO_CMD 54 -1400 -1200 200 R 50 50 1 1 B X Vdd_3 64 100 2000 200 D 50 50 1 1 W X PA1/USART2_RTS 15 1450 1550 200 L 50 50 1 1 B X PC5/ADC12_IN15 25 -1400 1150 200 R 50 50 1 1 B @@ -1128,17 +1128,17 @@ X PA13 46 1450 350 200 L 50 50 1 1 B X PB4/JNTRST 56 1450 -600 200 L 50 50 1 1 B X PA3/USART2_RX 17 1450 1350 200 L 50 50 1 1 B X PB1/ADC12_IN9 27 1450 -300 200 L 50 50 1 1 B -X PC6 37 -1400 1050 200 R 50 50 1 1 B +X PC6/SDIO_D6 37 -1400 1050 200 R 50 50 1 1 B X Vss_2 47 0 -2050 200 U 50 50 1 1 W X PB5/I2C1_SMBAI 57 1450 -700 200 L 50 50 1 1 B X Vss_4 18 200 -2050 200 U 50 50 1 1 W X PB2/BOOT1 28 1450 -400 200 L 50 50 1 1 B -X PC7 38 -1400 950 200 R 50 50 1 1 B +X PC7/SDIO_D7 38 -1400 950 200 R 50 50 1 1 B X Vdd_2 48 0 2000 200 D 50 50 1 1 W X PB6/I2C1_SCL 58 1450 -800 200 L 50 50 1 1 B X Vdd_4 19 200 2000 200 D 50 50 1 1 W X PB10/I2C2_SCL 29 1450 -1200 200 L 50 50 1 1 B -X PC8 39 -1400 850 200 R 50 50 1 1 B +X PC8/SDIO_D0 39 -1400 850 200 R 50 50 1 1 B X PA14 49 1450 250 200 L 50 50 1 1 B X PB7/I2C1_SDA 59 1450 -900 200 L 50 50 1 1 B ENDDRAW diff --git a/hardware/mpu/mpu.brd b/hardware/mpu/mpu.brd index 2293ab4..796fce5 100644 --- a/hardware/mpu/mpu.brd +++ b/hardware/mpu/mpu.brd @@ -1,4 +1,4 @@ -PCBNEW-BOARD Version 1 date Fre 14 Jun 2013 06:54:58 CEST +PCBNEW-BOARD Version 1 date Fre 14 Jun 2013 14:28:16 CEST # Created by Pcbnew(2011-05-25)-stable @@ -8,10 +8,10 @@ LayerCount 2 Ly 1FFF8001 EnabledLayers 1FFF8001 Links 147 -NoConn 20 +NoConn 22 Di 47250 29908 69079 53952 Ndraw 2 -Ntrack 580 +Ntrack 575 Nzone 0 BoardThickness 630 Nmodule 37 @@ -1650,14 +1650,14 @@ Ro 0.000000 0.000000 0.000000 $EndSHAPE3D $EndMODULE SM0805 $MODULE SM0805 -Po 55220 44680 1800 15 42806E04 51B78A32 ~~ +Po 55620 45060 2700 15 42806E04 51B78A32 ~~ Li SM0805 Sc 51B78A32 AR /51B666EA Op 0 0 0 At SMD -T0 0 0 250 250 1800 50 N V 21 N "C3" -T1 0 0 250 250 1800 50 N I 21 N "100nF" +T0 0 0 250 250 2700 50 N V 21 N "C3" +T1 0 0 250 250 2700 50 N I 21 N "100nF" DC -650 300 -650 250 50 21 DS -200 300 -600 300 50 21 DS -600 300 -600 -300 50 21 @@ -1666,14 +1666,14 @@ DS 200 -300 600 -300 50 21 DS 600 -300 600 300 50 21 DS 600 300 200 300 50 21 $PAD -Sh "1" R 350 550 0 0 1800 +Sh "1" R 350 550 0 0 2700 Dr 0 0 0 At SMD N 00888000 Ne 64 "VCC" Po -375 0 $EndPAD $PAD -Sh "2" R 350 550 0 0 1800 +Sh "2" R 350 550 0 0 2700 Dr 0 0 0 At SMD N 00888000 Ne 54 "GND" @@ -2823,17 +2823,13 @@ Po 0 54120 44360 54120 47910 80 -1 De 15 0 9 0 0 Po 0 54518 43962 54120 44360 80 -1 De 15 0 9 0 0 -Po 0 55404 43692 55404 44076 80 -1 +Po 0 55100 47930 55100 44380 80 -1 +De 15 0 10 0 0 +Po 0 54580 48450 55100 47930 80 -1 De 15 0 10 0 400000 -Po 0 55100 47930 54580 48450 80 -1 +Po 0 55404 44076 55404 43692 80 -1 De 15 0 10 0 800000 -Po 0 55100 45340 55100 47930 80 -1 -De 15 0 10 0 0 -Po 0 55220 45220 55100 45340 80 -1 -De 15 0 10 0 0 -Po 0 55220 44260 55220 45220 80 -1 -De 15 0 10 0 0 -Po 0 55404 44076 55220 44260 80 -1 +Po 0 55100 44380 55404 44076 80 -1 De 15 0 10 0 0 Po 0 55994 43692 55994 48036 80 -1 De 15 0 11 0 400000 @@ -3373,29 +3369,27 @@ Po 0 58355 41035 59242 41035 80 -1 De 15 0 50 0 800000 Po 0 58350 41040 58355 41035 80 -1 De 15 0 50 0 0 -Po 0 55560 39940 55560 42740 80 -1 +Po 0 54860 43440 54860 44140 80 -1 De 15 0 51 0 0 -Po 3 56120 38000 56120 38000 256 -1 +Po 0 55560 42740 54860 43440 80 -1 +De 15 0 51 0 0 +Po 0 54700 39080 55560 39940 80 -1 +De 15 0 51 0 0 +Po 0 54700 38580 54700 39080 80 -1 +De 15 0 51 0 0 +Po 3 54700 38580 54700 38580 256 -1 De 15 1 51 0 0 -Po 0 56120 38000 55540 38580 80 -1 -De 0 0 51 0 0 Po 0 55540 38580 54700 38580 80 -1 De 0 0 51 0 0 -Po 3 54700 38580 54700 38580 256 -1 +Po 0 56120 38000 55540 38580 80 -1 +De 0 0 51 0 0 +Po 3 56120 38000 56120 38000 256 -1 De 15 1 51 0 0 -Po 0 54700 38580 54700 39080 80 -1 -De 15 0 51 0 0 -Po 0 54700 39080 55560 39940 80 -1 +Po 0 55560 39940 55560 42740 80 -1 De 15 0 51 0 0 -Po 0 54460 47330 54580 47450 80 -1 +Po 0 54580 44420 54580 47450 80 -1 De 15 0 51 0 800000 -Po 0 54460 44280 54460 47330 80 -1 -De 15 0 51 0 0 -Po 0 54860 43880 54460 44280 80 -1 -De 15 0 51 0 0 -Po 0 54860 43440 54860 43880 80 -1 -De 15 0 51 0 0 -Po 0 55560 42740 54860 43440 80 -1 +Po 0 54860 44140 54580 44420 80 -1 De 15 0 51 0 0 Po 0 56430 38530 56120 38220 80 -1 De 15 0 51 0 0 @@ -3817,10 +3811,6 @@ Po 0 60580 48430 61580 48430 276 -1 De 0 0 64 0 C00000 Po 0 49550 39440 48550 39440 276 -1 De 0 0 64 0 C00000 -Po 0 55797 43692 55797 44478 80 -1 -De 15 0 64 0 400000 -Po 0 55797 44478 55595 44680 80 -1 -De 15 0 64 0 800000 Po 0 53255 38455 53255 38540 276 -1 De 15 0 64 0 800000 Po 0 59242 38833 59250 38825 276 -1 diff --git a/hardware/mpu/mpu.sch b/hardware/mpu/mpu.sch index 0772f3f..1f09732 100644 --- a/hardware/mpu/mpu.sch +++ b/hardware/mpu/mpu.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Fr 14 Jun 2013 06:04:08 CEST +EESchema Schematic File Version 2 date Fre 14 Jun 2013 14:49:53 CEST LIBS:power LIBS:device LIBS:transistors |