From 4fa06d2ed294a4f52057722fa8165198a8414bdd Mon Sep 17 00:00:00 2001
From: Christian Pointner <equinox@spreadspace.org>
Date: Tue, 3 Mar 2015 00:34:26 +0100
Subject: split up modemcfg into 2 smaller pieces added missing nomalized
 register read vor VCO_VC_DAC

---
 lib/cc1101.c | 30 +++++++++++++++++++++---------
 lib/cc1101.h |  7 +++++--
 2 files changed, 26 insertions(+), 11 deletions(-)

diff --git a/lib/cc1101.c b/lib/cc1101.c
index 1a4e9cc..091b9e4 100644
--- a/lib/cc1101.c
+++ b/lib/cc1101.c
@@ -449,13 +449,9 @@ void cc1101_set_freq(uint32_t freq)
   cc1101_spi_write_register(CC1101_REG_RW_FREQ2, (uint8_t)(freq) & CC1101_REG_RW_FREQ2_MASK);
 }
 
-uint64_t cc1101_get_modemcfg(void)
+uint32_t cc1101_get_modemcfg(void)
 {
-  uint64_t cfg = cc1101_spi_read_register(CC1101_REG_RW_MDMCFG4) & CC1101_REG_RW_MDMCFG4_MASK;
-  cfg = cfg << 8;
-  cfg |= cc1101_spi_read_register(CC1101_REG_RW_MDMCFG3) & CC1101_REG_RW_MDMCFG3_MASK;
-  cfg = cfg << 8;
-  cfg |= cc1101_spi_read_register(CC1101_REG_RW_MDMCFG2) & CC1101_REG_RW_MDMCFG2_MASK;
+  uint32_t cfg = cc1101_spi_read_register(CC1101_REG_RW_MDMCFG2) & CC1101_REG_RW_MDMCFG2_MASK;
   cfg = cfg << 8;
   cfg |= cc1101_spi_read_register(CC1101_REG_RW_MDMCFG1) & CC1101_REG_RW_MDMCFG1_MASK;
   cfg = cfg << 8;
@@ -463,14 +459,25 @@ uint64_t cc1101_get_modemcfg(void)
   return cfg;
 }
 
-void cc1101_set_modemcfg(uint64_t cfg)
+void cc1101_set_modemcfg(uint32_t cfg)
 {
   cc1101_spi_write_register(CC1101_REG_RW_MDMCFG0, cfg & CC1101_REG_RW_MDMCFG0_MASK);
   cfg = cfg >> 8;
   cc1101_spi_write_register(CC1101_REG_RW_MDMCFG1, cfg & CC1101_REG_RW_MDMCFG1_MASK);
   cfg = cfg >> 8;
   cc1101_spi_write_register(CC1101_REG_RW_MDMCFG2, cfg & CC1101_REG_RW_MDMCFG2_MASK);
-  cfg = cfg >> 8;
+}
+
+uint16_t cc1101_get_drate_bw(void)
+{
+  uint16_t cfg = cc1101_spi_read_register(CC1101_REG_RW_MDMCFG4) & CC1101_REG_RW_MDMCFG4_MASK;
+  cfg = cfg << 8;
+  cfg |= cc1101_spi_read_register(CC1101_REG_RW_MDMCFG3) & CC1101_REG_RW_MDMCFG3_MASK;
+  return cfg;
+}
+
+void cc1101_set_drate_bw(uint16_t cfg)
+{
   cc1101_spi_write_register(CC1101_REG_RW_MDMCFG3, cfg & CC1101_REG_RW_MDMCFG3_MASK);
   cfg = cfg >> 8;
   cc1101_spi_write_register(CC1101_REG_RW_MDMCFG4, cfg & CC1101_REG_RW_MDMCFG4_MASK);
@@ -592,7 +599,7 @@ uint32_t cc1101_get_fscal(void)
 {
   uint32_t cal = cc1101_spi_read_register(CC1101_REG_RW_FSCAL3) & CC1101_REG_RW_FSCAL3_MASK;
   cal = cal << 8;
-  cal = cc1101_spi_read_register(CC1101_REG_RW_FSCAL2) & CC1101_REG_RW_FSCAL2_MASK;
+  cal |= cc1101_spi_read_register(CC1101_REG_RW_FSCAL2) & CC1101_REG_RW_FSCAL2_MASK;
   cal = cal << 8;
   cal |= cc1101_spi_read_register(CC1101_REG_RW_FSCAL1) & CC1101_REG_RW_FSCAL1_MASK;
   cal = cal << 8;
@@ -731,6 +738,11 @@ uint8_t cc1101_get_pkt_status(void)
   return cc1101_spi_read_register(CC1101_REG_RO_PKTSTATUS) & CC1101_REG_RO_PKTSTATUS_MASK;
 }
 
+uint8_t cc1101_get_vco_vc_dac(void)
+{
+  return cc1101_spi_read_register(CC1101_REG_RO_VCO_VC_DAC) & CC1101_REG_RO_VCO_VC_DAC_MASK;
+}
+
 uint8_t cc1101_get_tx_bytes(void)
 {
   return cc1101_spi_read_register(CC1101_REG_RO_TXBYTES) & CC1101_REG_RO_TXBYTES_MASK;
diff --git a/lib/cc1101.h b/lib/cc1101.h
index 48454b6..cb46c6d 100644
--- a/lib/cc1101.h
+++ b/lib/cc1101.h
@@ -87,8 +87,10 @@ uint8_t cc1101_get_freq_offset(void);
 void cc1101_set_freq_offset(uint8_t freqoff);
 uint32_t cc1101_get_freq(void);
 void cc1101_set_freq(uint32_t freq);
-uint64_t cc1101_get_modemcfg(void);
-void cc1101_set_modemcfg(uint64_t cfg);
+uint32_t cc1101_get_modemcfg(void);
+void cc1101_set_modemcfg(uint32_t cfg);
+uint16_t cc1101_get_drate_bw(void);
+void cc1101_set_drate_bw(uint16_t cfg);
 uint8_t cc1101_get_deviatn(void);
 void cc1101_set_deviatn(uint8_t dev);
 
@@ -134,6 +136,7 @@ int8_t cc1101_get_rssi(void);
 uint8_t cc1101_get_marcstate(void);
 uint16_t cc1101_get_wortime(void);
 uint8_t cc1101_get_pkt_status(void);
+uint8_t cc1101_get_vco_vc_dac(void);
 uint8_t cc1101_get_tx_bytes(void);
 uint8_t cc1101_get_rx_bytes(void);
 uint8_t cc1101_get_rcctrl0_status(void);
-- 
cgit v1.2.3