diff options
author | Christian Pointner <equinox@spreadspace.org> | 2013-08-16 23:43:48 +0000 |
---|---|---|
committer | Christian Pointner <equinox@spreadspace.org> | 2013-08-16 23:43:48 +0000 |
commit | 2c978cb0d6673a78ea20d871cb288897b3e7ab49 (patch) | |
tree | 8702251f2e59c4ef026847634c6337ecd4fb3b3e | |
parent | moved usb-i2c-sl018 to tuer-rfid (diff) |
fixed Board definition for teenstep
git-svn-id: https://svn.spreadspace.org/avr/trunk@217 aa12f405-d877-488e-9caf-2d797e2a1cc7
-rw-r--r-- | lib/util.c | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -51,7 +51,7 @@ void cpu_init(void) #define BOOTLOADER_VEC 0x3800 #elif defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__) #define BOOTLOADER_VEC 0x3800 -#elif defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__teenstep__) +#elif defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) #define BOOTLOADER_VEC 0x3800 #else #define BOOTLOADER_VEC 0x0000 @@ -64,7 +64,7 @@ void reset2bootloader(void) { #if defined(__BOARD_teensy1__) || defined(__BOARD_teensy1pp__) || defined(__BOARD_teensy2__) || defined(__BOARD_teensy2pp__) || \ defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__) || \ - defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__teenstep__) || \ + defined(__BOARD_slowpandongle1__) || defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) || \ defined(__BOARD_minimus__) || defined(__BOARD_minimus32__) cli(); // disable watchdog, if enabled @@ -104,7 +104,7 @@ void reset2bootloader(void) DDRB = 0; DDRC = 0; DDRD = 0; PORTB = 0; PORTC = 0; PORTD = 0; #elif defined(__BOARD_hhd70dongle2__) || defined(__BOARD_hhd70dongle__) || defined(__BOARD_rda1846dongle__) || defined(__BOARD_culV3__) || \ - defined(__BOARD_slowpandongle2__) || defined(__teenstep__) + defined(__BOARD_slowpandongle2__) || defined(__BOARD_teenstep__) EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0; |